On 7/24/24 12:00 PM, Raphael Moreira Zinsly wrote:
Enable the register used by riscv_emit_stack_tie () to be passed as
an argument so we can tie the stack with other registers besides
hard_frame_pointer_rtx.
Also don't allow operand 1 of stack_tie<mode> to be optimized to sp
in preparation for the stack clash protection support.

gcc/ChangeLog:
        * config/riscv/riscv.cc (riscv_emit_stack_tie): Pass the
          register to be tied to the stack pointer as argument.
        * config/riscv/riscv.md (stack_tie<mode>): Don't match equal
          operands.
So NFC at this point, just infrastructure you need, presumably for the probing loops. One quick question:


diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 46c46039c33..5780c5abacf 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -3969,7 +3969,7 @@
        (unspec:BLK [(match_operand:X 0 "register_operand" "r")
                     (match_operand:X 1 "register_operand" "r")]
                    UNSPEC_TIE))]
-  ""
+  "!rtx_equal_p (operands[0], operands[1])"
    ""
    [(set_attr "type" "ghost")
     (set_attr "length" "0")]
I'm guessing this condition to to prevent subsequent passes from combing the stack tie with something like a reg->reg copy resulting in a stack tie with the same source/dest register?

Or are we trying to make sure the users of this insn never generate that scenario to begin with?

jeff

Reply via email to