On 7/24/24 9:15 AM, Christoph Müllner wrote:
auto_inc_dec (-O3) performs optimizations like the following if RVV and XTheadMemIdx is enabled. (insn 23 20 27 3 (set (mem:V4QI (reg:DI 136 [ ivtmp.13 ]) [0 MEM <vector(4) char> [(char *)_39]+0 S4 A32]) (reg:V4QI 168)) "gcc/testsuite/gcc.target/riscv/pr116033.c":12:27 3183 {*movv4qi} (nil)) (insn 40 39 41 3 (set (reg:DI 136 [ ivtmp.13 ]) (plus:DI (reg:DI 136 [ ivtmp.13 ]) (const_int 20 [0x14]))) 5 {adddi3} (nil)) ====> (insn 23 20 27 3 (set (mem:V4QI (post_modify:DI (reg:DI 136 [ ivtmp.13 ]) (plus:DI (reg:DI 136 [ ivtmp.13 ]) (const_int 20 [0x14]))) [0 MEM <vector(4) char> [(char *)_39]+0 S4 A32]) (reg:V4QI 168)) "gcc/testsuite/gcc.target/riscv/pr116033.c":12:27 3183 {*movv4qi} (expr_list:REG_INC (reg:DI 136 [ ivtmp.13 ]) (nil))) The reason why the pass believes that this is legal is, that the mode test in th_memidx_classify_address_modify() requires INTEGRAL_MODE_P (mode), which includes vector modes. Let's restrict the mode test such, that only MODE_INT is allowed. PR target/116033 gcc/ChangeLog: * config/riscv/thead.cc (th_memidx_classify_address_modify): Fix mode test. gcc/testsuite/ChangeLog: * gcc.target/riscv/pr116033.c: New test.
OK jeff