On Tue, Dec 12, 2023 at 1:47 PM Jiang, Haochen via Gcc-regression
<gcc-regress...@gcc.gnu.org> wrote:
>
> > -----Original Message-----
> > From: Jiang, Haochen
> > Sent: Tuesday, December 12, 2023 9:11 AM
> > To: Andrew Pinski (QUIC) <quic_apin...@quicinc.com>; haochen.jiang
> > <haoch...@ecsmtp.sh.intel.com>; gcc-regress...@gcc.gnu.org; gcc-
> > patc...@gcc.gnu.org
> > Subject: RE: [r14-6420 Regression] FAIL: gcc.target/i386/pr110790-2.c scan-
> > assembler-times shrq 2 on Linux/x86_64
> >
> > > -----Original Message-----
> > > From: Andrew Pinski (QUIC) <quic_apin...@quicinc.com>
> > > Sent: Tuesday, December 12, 2023 9:01 AM
> > > To: haochen.jiang <haoch...@ecsmtp.sh.intel.com>; Andrew Pinski (QUIC)
> > > <quic_apin...@quicinc.com>; gcc-regress...@gcc.gnu.org; gcc-
> > > patc...@gcc.gnu.org; Jiang, Haochen <haochen.ji...@intel.com>
> > > Subject: RE: [r14-6420 Regression] FAIL: gcc.target/i386/pr110790-2.c
> > scan-
> > > assembler-times shrq 2 on Linux/x86_64
> > >
> > > > -----Original Message-----
> > > > From: haochen.jiang <haoch...@ecsmtp.sh.intel.com>
> > > > Sent: Monday, December 11, 2023 4:54 PM
> > > > To: Andrew Pinski (QUIC) <quic_apin...@quicinc.com>; gcc-
> > > > regress...@gcc.gnu.org; gcc-patches@gcc.gnu.org;
> > haochen.ji...@intel.com
> > > > Subject: [r14-6420 Regression] FAIL: gcc.target/i386/pr110790-2.c scan-
> > > > assembler-times shrq 2 on Linux/x86_64
> > > >
> > > > On Linux/x86_64,
> > > >
> > > > 85c5efcffed19ca6160eeecc2d4faebd9fee63aa is the first bad commit
> > commit
> > > > 85c5efcffed19ca6160eeecc2d4faebd9fee63aa
> > > > Author: Andrew Pinski <quic_apin...@quicinc.com>
> > > > Date: Sat Nov 11 15:54:10 2023 -0800
> > > >
> > > > MATCH: (convert)(zero_one !=/== 0/1) for outer type and zero_one
> > > > type
> > are
> > > > the same
> > > >
> > > > caused
> > > >
> > > > FAIL: gcc.target/i386/pr110790-2.c scan-assembler-times shrq 2
> > >
> > >
> > > So I think this is a testsuite issue, in that shrx instruction is being
> > > used here
> > > instead of just ` shrq` due to that instruction being enabled with `-
> > > march=cascadelake` .
> > > Can someone confirm that and submit a testcase change?
> >
> > I will do that today.
>
> I suppose we might just need to change the scan-asm from shrq to shr to cover
> shrx.
Please use shr\[qx\], not shr.
>
> Is that ok? If it is, I will commit a patch to change that.
>
> Thx,
> Haochen
>
> >
> > Thx,
> > Haochen
> >
> > >
> > > Thanks,
> > > Andrew
> > >
> > > >
> > > > with GCC configured with
> > > >
> > > > ../../gcc/configure --prefix=/export/users/haochenj/src/gcc-
> > > > bisect/master/master/r14-6420/usr --enable-clocale=gnu --with-system-
> > zlib -
> > > > -with-demangler-in-ld --with-fpmath=sse --enable-
> > languages=c,c++,fortran --
> > > > enable-cet --without-isl --enable-libmpx x86_64-linux
> > > > --disable-bootstrap
> > > >
> > > > To reproduce:
> > > >
> > > > $ cd {build_dir}/gcc && make check
> > > > RUNTESTFLAGS="i386.exp=gcc.target/i386/pr110790-2.c --
> > > > target_board='unix{-m64\ -march=cascadelake}'"
> > > >
> > > > (Please do not reply to this email, for question about this report,
> > > > contact
> > me at
> > > > haochen dot jiang at intel.com.) (If you met problems with cascadelake
> > > > related, disabling AVX512F in command line might save that.) (However,
> > > > please make sure that there is no potential problems with AVX512.)
--
BR,
Hongtao
