On Wed, 2023-11-29 at 20:37 +0800, Xi Ruoyao wrote:
> On Wed, 2023-11-29 at 17:33 +0800, Xi Ruoyao wrote:
> > On Mon, 2023-11-27 at 23:06 -0700, Jeff Law wrote:
> > > This has (of course) been tested on rv64. It's also been bootstrapped
> > > and regression tested on x86. Bootstrap and regression tested (C only)
> > > for m68k, sh4, sh4eb, alpha. Earlier versions were also bootstrapped
> > > and regression tested on ppc, hppa and s390x (C only for those as well).
> > > It's also been tested on the various crosses in my tester. So we've
> > > got reasonable coverage of 16, 32 and 64 bit targets, big and little
> > > endian, with and without SHIFT_COUNT_TRUNCATED and all kinds of other
> > > oddities.
> > >
> > > The included tests are for RISC-V only because not all targets are going
> > > to have extraneous extensions. There's tests from coremark, x264 and
> > > GCC's bz database. It probably wouldn't be hard to add aarch64
> > > testscases. The BZs listed are improved by this patch for aarch64.
> >
> > I've successfully bootstrapped this on loongarch64-linux-gnu and tried
> > the added test cases. For loongarch64 the redundant extensions are
> > removed for core_bench_list.c, core_init_matrix.c, core_list_init.c,
> > matrix_add_const.c, and pr111384.c, but not mem-extend.c.
> Follow up: no regression in GCC test suite on LoongArch.
>
> > Should I change something in LoongArch backend in order to make ext_dce
> > work for mem-extend.c too? If yes then any pointers?
Hmm... This test seems not working even for RISC-V:
$ ./gcc/cc1 -O2 ../gcc/gcc/testsuite/gcc.target/riscv/mem-extend.c -nostdinc
-fdump-rtl-ext_dce -march=rv64gc_zbb -mabi=lp64d -o- 2>&1 | grep -F zext.h
zext.h a5,a5
zext.h a4,a4
and the 294r.ext_dce file does not contain "Successfully transformed
to:" lines.
--
Xi Ruoyao <xry...@xry111.site>
School of Aerospace Science and Technology, Xidian University
