[Changes from v1: save calls to fprintf] Unfortunately, the pseudo-C dialect syntax used for some of the v3 atomic instructions clashes with unconditionally printing the surrounding parentheses in bpf_print_operand_address.
Instead, place the parentheses in the output templates where needed. gcc/ * config/bpf/bpf.cc (bpf_print_operand_address): Don't print enclosing parentheses for pseudo-C dialect. * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around operands of pseudo-C dialect output templates where needed. (zero_extendqidi2): Likewise. (zero_extendsidi2): Likewise. (*mov<MM:mode>): Likewise. --- gcc/config/bpf/bpf.cc | 11 +++++++---- gcc/config/bpf/bpf.md | 12 ++++++------ 2 files changed, 13 insertions(+), 10 deletions(-) diff --git a/gcc/config/bpf/bpf.cc b/gcc/config/bpf/bpf.cc index 55b6927a62f..2e1e3e3abcf 100644 --- a/gcc/config/bpf/bpf.cc +++ b/gcc/config/bpf/bpf.cc @@ -933,9 +933,10 @@ bpf_print_operand_address (FILE *file, rtx addr) switch (GET_CODE (addr)) { case REG: - fprintf (file, asm_dialect == ASM_NORMAL ? "[" : "("); + if (asm_dialect == ASM_NORMAL) + fprintf (file, "["); bpf_print_register (file, addr, 0); - fprintf (file, asm_dialect == ASM_NORMAL ? "+0]" : "+0)"); + fprintf (file, asm_dialect == ASM_NORMAL ? "+0]" : "+0"); break; case PLUS: { @@ -944,11 +945,13 @@ bpf_print_operand_address (FILE *file, rtx addr) if (GET_CODE (op0) == REG && GET_CODE (op1) == CONST_INT) { - fprintf (file, asm_dialect == ASM_NORMAL ? "[" : "("); + if (asm_dialect == ASM_NORMAL) + fprintf (file, "["); bpf_print_register (file, op0, 0); fprintf (file, "+"); output_addr_const (file, op1); - fprintf (file, asm_dialect == ASM_NORMAL ? "]" : ")"); + if (asm_dialect == ASM_NORMAL) + fprintf (file, "]"); } else fatal_insn ("invalid address in operand", addr); diff --git a/gcc/config/bpf/bpf.md b/gcc/config/bpf/bpf.md index 64342ea1de2..579a8213b09 100644 --- a/gcc/config/bpf/bpf.md +++ b/gcc/config/bpf/bpf.md @@ -260,7 +260,7 @@ (define_insn "zero_extendhidi2" "@ {and\t%0,0xffff|%0 &= 0xffff} {mov\t%0,%1\;and\t%0,0xffff|%0 = %1;%0 &= 0xffff} - {ldxh\t%0,%1|%0 = *(u16 *) %1}" + {ldxh\t%0,%1|%0 = *(u16 *) (%1)}" [(set_attr "type" "alu,alu,ldx")]) (define_insn "zero_extendqidi2" @@ -270,7 +270,7 @@ (define_insn "zero_extendqidi2" "@ {and\t%0,0xff|%0 &= 0xff} {mov\t%0,%1\;and\t%0,0xff|%0 = %1;%0 &= 0xff} - {ldxh\t%0,%1|%0 = *(u8 *) %1}" + {ldxh\t%0,%1|%0 = *(u8 *) (%1)}" [(set_attr "type" "alu,alu,ldx")]) (define_insn "zero_extendsidi2" @@ -280,7 +280,7 @@ (define_insn "zero_extendsidi2" "" "@ * return bpf_has_alu32 ? \"{mov32\t%0,%1|%0 = %1}\" : \"{mov\t%0,%1\;and\t%0,0xffffffff|%0 = %1;%0 &= 0xffffffff}\"; - {ldxw\t%0,%1|%0 = *(u32 *) %1}" + {ldxw\t%0,%1|%0 = *(u32 *) (%1)}" [(set_attr "type" "alu,ldx")]) ;;; Sign-extension @@ -319,11 +319,11 @@ (define_insn "*mov<MM:mode>" (match_operand:MM 1 "mov_src_operand" " q,rI,B,r,I"))] "" "@ - {ldx<mop>\t%0,%1|%0 = *(<smop> *) %1} + {ldx<mop>\t%0,%1|%0 = *(<smop> *) (%1)} {mov\t%0,%1|%0 = %1} {lddw\t%0,%1|%0 = %1 ll} - {stx<mop>\t%0,%1|*(<smop> *) %0 = %1} - {st<mop>\t%0,%1|*(<smop> *) %0 = %1}" + {stx<mop>\t%0,%1|*(<smop> *) (%0) = %1} + {st<mop>\t%0,%1|*(<smop> *) (%0) = %1}" [(set_attr "type" "ldx,alu,alu,stx,st")]) ;;;; Shifts -- 2.40.1