Re: [PATCH v6] RISC-V: Add support for experimental zfa extension.

[Kito Cheng via Gcc-patches]

FYI:

This PR described the syntax of fli instruction, which is implemented
in LLVM, and the latest binutils patch (IIRC :P):

https://github.com/riscv-non-isa/riscv-asm-manual/pull/85