On 3/13/23 02:28, juzhe.zh...@rivai.ai wrote:
From: Ju-Zhe Zhong <juzhe.zh...@rivai.ai>
For DEST EEW < SOURCE EEW, we can partial overlap register
according to RVV ISA.
gcc/ChangeLog:
* config/riscv/vector.md: Fix RA constraint.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/narrow_constraint-12.c: New test.
This is OK.
The one question I keep having when I read these patterns is why we have
the earlyclobber.
Earlyclobber means that the output is potentially written before the
inputs are consumed. Typically for a single instruction pattern such
constraints wouldn't make a lot of sense as *usually* the inputs are
consumed before the output is written.
Just looking for a clarification as to why the earlyclobbers are needed
at all, particularly for non-reduction patterns.
jeff
