On 2023/3/13 13:14, Xi Ruoyao wrote:
On Mon, 2023-03-13 at 12:58 +0800, Lulu Cheng wrote:
在 2023/3/13 下午12:54, Xi Ruoyao 写道:
On Mon, 2023-03-13 at 12:40 +0800, WANG Xuerui wrote:
This is ugly. The fact all current LA32 models don't support CRC
ops is
just a coincidence; it's entirely possible for a future product
iteration to introduce such functionality. It's not like the
CRC*.W.W.W
ops require anything wider than 32 bits, after all.
Maybe the correct way would be adding a switch like MIPS -mcrc or
x86
-mcrc32.
Because these instructions are part of the LA64 base instruction set,
there are no control options here.
I'd postpone the change until we add LA32 support because there is no
details about LA32 now and it's hard to determine how to gate this in a
best way...
There is, actually; the "reduced" LA32 ISA manual was released together
with the LA64 one. And CRC ops are certainly absent there.
However I agree that currently it's not as rigorously defined as LA64,
partly in that no LA32 micro-architectures have respective user manuals
available. And Loongson doesn't seem to actively push for LA32 Primary
support either. (IMO LA32 Primary support should be *prioritized*
because (a) it's trivial and (b) it's beneficial to bring students
aboard as early as possible, especially given RISC-V's significant
presence now </rant>)
