Ok, please include PR 104790 in the ChangeLog. Thanks, Kyrill From: Andre Vieira (lists) <andre.simoesdiasvie...@arm.com> Sent: Monday, March 7, 2022 2:17 PM To: Kyrylo Tkachov <kyrylo.tkac...@arm.com> Cc: GCC Patches <gcc-patches@gcc.gnu.org> Subject: Re: [arm] MVE: Relax addressing modes for full loads and stores
On 17/01/2022 07:48, Christophe Lyon wrote: Hi André, On Fri, Jan 14, 2022 at 6:03 PM Andre Vieira (lists) via Gcc-patches <gcc-patches@gcc.gnu.org<mailto:gcc-patches@gcc.gnu.org>> wrote: Hi Christophe, This patch relaxes the addressing modes for the mve full load and stores (by full loads and stores I mean non-widening or narrowing loads and stores resp). The code before was requiring a LO_REGNUM for these, where this is only a requirement if the load is widening or the store narrowing. So with this your patch should not be necessary. Regression tested on arm-none-eabi-gcc. Can you please confirm this fixes the issue you were seeing too? Yes, I confirm this fixes the problem I was fixing with my patch #15 in my MVE/VCMP/VCOND series. I'll drop it. Thanks! Christophe gcc/ChangeLog: * config/arm/arm.h (MVE_STN_LDW_MODE): New MACRO. * config/arm/arm.c (mve_vector_mem_operand): Relax constraint on base register for non widening loads or narrowing stores. Kind Regards, Andre Vieira Ping, I noticed this also fixes PR 104790. Kind regards, Andre
