Hi!  While reviewing the recent 32-bit changes for the new builtin 
infrastructure,
I realized that I needed another stanza to represent builtins requiring both
-mcpu=power6 and -mpowerpc64.  (There's only one of these, but nonetheless...)
So this patch adds that support in the same fashion as [power7-64] and
[power9-64].  Bootstrapped and tested on powerpc64le-linux-gnu, and on
powerpc64-linux-gnu with -m32/-m64.  Is this okay for trunk?

Thanks!
Bill


2021-11-16  Bill Schmidt  <wschm...@linux.ibm.com>

gcc/
        * config/rs6000/rs6000-builtin-new.def: Add power6-64 stanza.
        Move CMPB to power6-64 stanza.
        * config/rs6000/rs6000-call.c (rs6000_invalid_new_builtin): Handle
        ENB_P6_64 case.
        (rs6000_new_builtin_is_supported): Likewise.
        (rs6000_expand_new_builtin): Likewise.
        (rs6000_init_builtins): Likewise.
        * config/rs6000/rs6000-gen-builtins.c (bif_stanza): Add
        BSTZ_P6_64.
        (stanza_map): Add entry mapping power6-64 to BSTZ_P6_64.
        (enable_string): Add "ENB_P6_64".
        (write_decls): Add ENB_P6_64 to bif_enable enum.
---
 gcc/config/rs6000/rs6000-builtin-new.def |  9 ++++++---
 gcc/config/rs6000/rs6000-call.c          | 10 ++++++++++
 gcc/config/rs6000/rs6000-gen-builtins.c  |  4 ++++
 3 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-builtin-new.def 
b/gcc/config/rs6000/rs6000-builtin-new.def
index 1dd8f6b40b2..58dfce1ca37 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -266,13 +266,16 @@
 
 ; Power6 builtins (ISA 2.05).
 [power6]
-  const signed long __builtin_p6_cmpb (signed long, signed long);
-    CMPB cmpbdi3 {}
-
   const signed int __builtin_p6_cmpb_32 (signed int, signed int);
     CMPB_32 cmpbsi3 {}
 
 
+; Power6 builtins requiring 64-bit GPRs (even with 32-bit addressing).
+[power6-64]
+  const signed long __builtin_p6_cmpb (signed long, signed long);
+    CMPB cmpbdi3 {}
+
+
 ; AltiVec builtins.
 [altivec]
   const vsc __builtin_altivec_abs_v16qi (vsc);
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 83e1abb6118..822a9736591 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -11919,6 +11919,10 @@ rs6000_invalid_new_builtin (enum rs6000_gen_builtins 
fncode)
     case ENB_P6:
       error ("%qs requires the %qs option", name, "-mcpu=power6");
       break;
+    case ENB_P6_64:
+      error ("%qs requires the %qs option and either the %qs or %qs option",
+            name, "-mcpu=power6", "-m64", "-mpowerpc64");
+      break;
     case ENB_ALTIVEC:
       error ("%qs requires the %qs option", name, "-maltivec");
       break;
@@ -13346,6 +13350,8 @@ rs6000_new_builtin_is_supported (enum 
rs6000_gen_builtins fncode)
       return TARGET_POPCNTB;
     case ENB_P6:
       return TARGET_CMPB;
+    case ENB_P6_64:
+      return TARGET_CMPB && TARGET_POWERPC64;
     case ENB_P7:
       return TARGET_POPCNTD;
     case ENB_P7_64:
@@ -15697,6 +15703,8 @@ rs6000_expand_new_builtin (tree exp, rtx target,
   if (!(e == ENB_ALWAYS
        || (e == ENB_P5         && TARGET_POPCNTB)
        || (e == ENB_P6         && TARGET_CMPB)
+       || (e == ENB_P6_64      && TARGET_CMPB
+                               && TARGET_POWERPC64)
        || (e == ENB_ALTIVEC    && TARGET_ALTIVEC)
        || (e == ENB_CELL       && TARGET_ALTIVEC
                                && rs6000_cpu == PROCESSOR_CELL)
@@ -16419,6 +16427,8 @@ rs6000_init_builtins (void)
            continue;
          if (e == ENB_P6 && !TARGET_CMPB)
            continue;
+         if (e == ENB_P6_64 && !(TARGET_CMPB && TARGET_POWERPC64))
+           continue;
          if (e == ENB_ALTIVEC && !TARGET_ALTIVEC)
            continue;
          if (e == ENB_VSX && !TARGET_VSX)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c 
b/gcc/config/rs6000/rs6000-gen-builtins.c
index 1655a2fd765..4ce83bd2290 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -212,6 +212,7 @@ enum bif_stanza
  BSTZ_ALWAYS,
  BSTZ_P5,
  BSTZ_P6,
+ BSTZ_P6_64,
  BSTZ_ALTIVEC,
  BSTZ_CELL,
  BSTZ_VSX,
@@ -245,6 +246,7 @@ static stanza_entry stanza_map[NUMBIFSTANZAS] =
     { "always",                BSTZ_ALWAYS     },
     { "power5",                BSTZ_P5         },
     { "power6",                BSTZ_P6         },
+    { "power6-64",     BSTZ_P6_64      },
     { "altivec",       BSTZ_ALTIVEC    },
     { "cell",          BSTZ_CELL       },
     { "vsx",           BSTZ_VSX        },
@@ -269,6 +271,7 @@ static const char *enable_string[NUMBIFSTANZAS] =
     "ENB_ALWAYS",
     "ENB_P5",
     "ENB_P6",
+    "ENB_P6_64",
     "ENB_ALTIVEC",
     "ENB_CELL",
     "ENB_VSX",
@@ -2227,6 +2230,7 @@ write_decls (void)
   fprintf (header_file, "  ENB_ALWAYS,\n");
   fprintf (header_file, "  ENB_P5,\n");
   fprintf (header_file, "  ENB_P6,\n");
+  fprintf (header_file, "  ENB_P6_64,\n");
   fprintf (header_file, "  ENB_ALTIVEC,\n");
   fprintf (header_file, "  ENB_CELL,\n");
   fprintf (header_file, "  ENB_VSX,\n");
-- 
2.27.0


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