On Tue, Nov 16, 2021 at 4:15 PM Kong, Lingling via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> Hi,
>
> vcvtph2ps and vcvtps2ph should be used to convert _Float16 to SFmode with
> -mf16c. So added define_insn extendhfsf2 and truncsfhf2 for target_f16c.
>
> OK for master?
>
> gcc/ChangeLog:
>
> PR target/102811
> * config/i386/i386.md (extendhfsf2): Add extenndhfsf2 for f16c.
> (extendhfdf2): Split extendhf<mode>2 into separate extendhfsf2,
> extendhfdf2.
> (truncsfhf2): Likewise.
> (truncdfhf2): Likewise.
>
> gcc/testsuite/ChangeLog:
>
> PR target/102811
> * gcc.target/i386/avx512vl-vcvtps2ph-pr102811.c: New test.
> ---
> gcc/config/i386/i386.md | 48 +++++++++++++++----
> .../i386/avx512vl-vcvtps2ph-pr102811.c | 10 ++++
> 2 files changed, 49 insertions(+), 9 deletions(-) create mode 100644
> gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-pr102811.c
>
> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index
> 6eb9de81921..c5415475342 100644
> --- a/gcc/config/i386/i386.md
> +++ b/gcc/config/i386/i386.md
> @@ -4574,15 +4574,30 @@
> emit_move_insn (operands[0], CONST0_RTX (V2DFmode));
> })
>
> -(define_insn "extendhf<mode>2"
> - [(set (match_operand:MODEF 0 "nonimm_ssenomem_operand" "=v")
> - (float_extend:MODEF
> +(define_insn "extendhfsf2"
> + [(set (match_operand:SF 0 "register_operand" "=v")
> + (float_extend:SF
> + (match_operand:HF 1 "nonimmediate_operand" "vm")))]
> + "TARGET_AVX512FP16 || TARGET_F16C || TARGET_AVX512VL"
> +{
> + if (TARGET_AVX512FP16)
> + return "vcvtsh2ss\t{%1, %0, %0|%0, %0, %1}";
> + else
> + return "vcvtph2ps\t{%1, %0|%0, %1}"; }
> + [(set_attr "type" "ssecvt")
> + (set_attr "prefix" "maybe_evex")
> + (set_attr "mode" "SF")])
> +
> +(define_insn "extendhfdf2"
> + [(set (match_operand:DF 0 "nonimm_ssenomem_operand" "=v")
> + (float_extend:DF
> (match_operand:HF 1 "nonimmediate_operand" "vm")))]
> "TARGET_AVX512FP16"
> - "vcvtsh2<ssemodesuffix>\t{%1, %0, %0|%0, %0, %1}"
> + "vcvtsh2sd\t{%1, %0, %0|%0, %0, %1}"
> [(set_attr "type" "ssecvt")
> (set_attr "prefix" "evex")
> - (set_attr "mode" "<MODE>")])
> + (set_attr "mode" "DF")])
>
>
> (define_expand "extend<mode>xf2"
> @@ -4766,12 +4781,27 @@
>
> ;; Conversion from {SF,DF}mode to HFmode.
>
> -(define_insn "trunc<mode>hf2"
> +(define_insn "truncsfhf2"
> + [(set (match_operand:HF 0 "register_operand" "=v")
> + (float_truncate:HF
> + (match_operand:SF 1 "nonimmediate_operand" "vm")))]
> + "TARGET_AVX512FP16 || TARGET_F16C || TARGET_AVX512VL"
> + {
> + if (TARGET_AVX512FP16)
> + return "vcvtss2sh\t{%1, %d0|%d0, %1}";
> + else
> + return "vcvtps2ph\t{0, %1, %0|%0, %1, 0}";
> + }
> + [(set_attr "type" "ssecvt")
> + (set_attr "prefix" "evex")
> + (set_attr "mode" "HF")])
> +
> +(define_insn "truncdfhf2"
> [(set (match_operand:HF 0 "register_operand" "=v")
> - (float_truncate:HF
> - (match_operand:MODEF 1 "nonimmediate_operand" "vm")))]
> + (float_truncate:HF
> + (match_operand:DF 1 "nonimmediate_operand" "vm")))]
> "TARGET_AVX512FP16"
> - "vcvt<ssemodesuffix>2sh\t{%1, %d0|%d0, %1}"
> + "vcvtsd2sh\t{%1, %d0|%d0, %1}"
> [(set_attr "type" "ssecvt")
> (set_attr "prefix" "evex")
> (set_attr "mode" "HF")])
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-pr102811.c
> b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-pr102811.c
> new file mode 100644
> index 00000000000..ab44a304a03
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-pr102811.c
> @@ -0,0 +1,10 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -mf16c -mno-avx512fp16" } */
> +/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]" 2 } } */
> +/* { dg-final { scan-assembler-times "vcvtps2ph\[ \\t\]" 1 } } */
> +/* { dg-final { scan-assembler-not "__truncsfhf2\[ \\t\]"} } */
> +/* { dg-final { scan-assembler-not "__extendhfsf2\[ \\t\]"} } */
> +_Float16 test (_Float16 a, _Float16 b)
> +{
> + return a + b;
> +}
> --
> 2.18.1
>
--
BR,
Hongtao
