Hi: AVX512F supported vscalefs{s,d} which is the same as ldexp except the second operand should be floating point. Bootstrapped and regtested on x86_64-linux-gnu{-m32,}.
gcc/ChangeLog: PR target/98309 * config/i386/i386.md (ldexp<mode>3): Extend to vscalefs[sd] when TARGET_AVX512F and TARGET_SSE_MATH. gcc/testsuite/ChangeLog: PR target/98309 * gcc.target/i386/pr98309-1.c: New test. * gcc.target/i386/pr98309-2.c: New test. --- gcc/config/i386/i386.md | 34 +++++++++++++++----- gcc/testsuite/gcc.target/i386/pr98309-1.c | 18 +++++++++++ gcc/testsuite/gcc.target/i386/pr98309-2.c | 39 +++++++++++++++++++++++ 3 files changed, 83 insertions(+), 8 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr98309-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr98309-2.c diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index bc1c30b77f4..56b09c566ed 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -17914,17 +17914,35 @@ (define_expand "ldexp<mode>3" [(use (match_operand:MODEF 0 "register_operand")) (use (match_operand:MODEF 1 "general_operand")) (use (match_operand:SI 2 "register_operand"))] - "TARGET_USE_FANCY_MATH_387 - && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH) - || TARGET_MIX_SSE_I387) + "((TARGET_USE_FANCY_MATH_387 + && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH) + || TARGET_MIX_SSE_I387)) + || (TARGET_AVX512F && TARGET_SSE_MATH)) && flag_unsafe_math_optimizations" { - rtx op0 = gen_reg_rtx (XFmode); - rtx op1 = gen_reg_rtx (XFmode); + /* Prefer avx512f version. */ + if (TARGET_AVX512F && TARGET_SSE_MATH) + { + rtx op2 = gen_reg_rtx (<MODE>mode); + emit_insn (gen_floatsi<mode>2 (op2, operands[2])); + operands[0] = lowpart_subreg (<ssevecmodef>mode, operands[0], <MODE>mode); + if (MEM_P (operands[1])) + operands[1] = force_reg (<MODE>mode, operands[1]); + operands[1] = lowpart_subreg (<ssevecmodef>mode, operands[1], <MODE>mode); + op2 = lowpart_subreg (<ssevecmodef>mode, op2, <MODE>mode); + emit_insn (gen_avx512f_vmscalef<ssevecmodelower> (operands[0], + operands[1], + op2)); + } + else + { + rtx op0 = gen_reg_rtx (XFmode); + rtx op1 = gen_reg_rtx (XFmode); - emit_insn (gen_extend<mode>xf2 (op1, operands[1])); - emit_insn (gen_ldexpxf3 (op0, op1, operands[2])); - emit_insn (gen_truncxf<mode>2 (operands[0], op0)); + emit_insn (gen_extend<mode>xf2 (op1, operands[1])); + emit_insn (gen_ldexpxf3 (op0, op1, operands[2])); + emit_insn (gen_truncxf<mode>2 (operands[0], op0)); + } DONE; }) diff --git a/gcc/testsuite/gcc.target/i386/pr98309-1.c b/gcc/testsuite/gcc.target/i386/pr98309-1.c new file mode 100644 index 00000000000..3a7afb58971 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr98309-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2 -mfpmath=sse -ffast-math" } */ +/* { dg-final { scan-assembler-times "vcvtsi2s\[sd\]" "2" } } */ +/* { dg-final { scan-assembler-times "vscalefs\[sd\]" "2" } } */ + +double +__attribute__((noipa)) +foo (double a, int b) +{ + return __builtin_ldexp (a, b); +} + +float +__attribute__((noipa)) +foo2 (float a, int b) +{ + return __builtin_ldexpf (a, b); +} diff --git a/gcc/testsuite/gcc.target/i386/pr98309-2.c b/gcc/testsuite/gcc.target/i386/pr98309-2.c new file mode 100644 index 00000000000..ecfb9168b7d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr98309-2.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-mavx512f -O2 -mfpmath=sse -ffast-math" } */ +/* { dg-require-effective-target avx512f } */ + +#define AVX512F +#ifndef CHECK +#define CHECK "avx512f-helper.h" +#endif + +#include CHECK + +#include "pr98309-1.c" + +double +__attribute__((noipa, target("fpmath=387"))) +foo_i387 (double a, int b) +{ + return __builtin_ldexp (a, b); +} + +float +__attribute__((noipa, target("fpmath=387"))) +foo2_i387 (float a, int b) +{ + return __builtin_ldexpf (a, b); +} + +static void +test_512 (void) +{ + float fa = 14.5; + double da = 44.5; + int fb = 12; + int db = 8; + if (foo_i387 (da, db) != foo (da, db)) + abort (); + if (foo2_i387 (fa, fb) != foo2 (fa, fb)) + abort (); +} -- 2.27.0