[PATCH] docs: Add 'S' to Machine Constraints for RISC-V

[Kito Cheng]

It was undocument before, but already used in linux kernel, so LLVM
community suggest we should document that, so that make it become
supported/documented/non-internal machine constraints.

gcc/ChangeLog:

        PR target/101275
        * doc/md.text (Machine Constraints): Document the 'S' constraints
        for RISC-V.
---
 gcc/doc/md.texi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 00caf3844cc..b776623e8a5 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -3536,6 +3536,9 @@ A 5-bit unsigned immediate for CSR access instructions.
 @item A
 An address that is held in a general-purpose register.
 
+@item S
+A constant call address.
+
 @end table
 
 @item RX---@file{config/rx/constraints.md}
-- 
2.31.1