Hi,

As subject, this patch corrects the type attribute in RTL patterns that
generate XTN/XTN2 instructions to be "neon_move_narrow_q".

This makes a material difference because these instructions can be
executed on both SIMD pipes in the Cortex-A57 core model, whereas the
"neon_shift_imm_narrow_q" attribute (in use until now) would suggest
to the scheduler that they could only execute on one of the two
pipes.

Regression tested and bootstrapped on aarch64-none-linux-gnu - no
issues.

Ok for master?

Thanks,
Jonathan

---

gcc/ChangeLog:

2021-05-18  Jonathan Wright  <jonathan.wri...@arm.com>

        * config/aarch64/aarch64-simd.md: Use "neon_move_narrow_q"
        type attribute in patterns generating XTN(2).

Attachment: rb14492.patch
Description: rb14492.patch

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