On RISC-V we are facing the fact, that our conditional branches
require Pmode conditions. Currently, we generate them explicitly
with a check for Pmode and then calling the proper generator
(i.e. gen_cbranchdi4 on RV64 and gen_cbranchsi4 on RV32).
Let's make simplify this code by using gen_cbranch4 (Pmode).
gcc/
PR 100266
* config/rsicv/riscv.c (riscv_block_move_loop): Simplify.
* config/rsicv/riscv.md (cbranch<mode>4): Generate helpers.
---
gcc/config/riscv/riscv.c | 5 +----
gcc/config/riscv/riscv.md | 2 +-
2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index 87cdde73ae21..6e97b38db6db 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -3250,10 +3250,7 @@ riscv_block_move_loop (rtx dest, rtx src, unsigned
HOST_WIDE_INT length,
/* Emit the loop condition. */
test = gen_rtx_NE (VOIDmode, src_reg, final_src);
- if (Pmode == DImode)
- emit_jump_insn (gen_cbranchdi4 (test, src_reg, final_src, label));
- else
- emit_jump_insn (gen_cbranchsi4 (test, src_reg, final_src, label));
+ emit_jump_insn (gen_cbranch4 (Pmode, test, src_reg, final_src, label));
/* Mop up any left-over bytes. */
if (leftover)
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index c3687d57047b..52f8a321ac23 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -1908,7 +1908,7 @@
(label_ref (match_operand 1))
(pc)))])
-(define_expand "cbranch<mode>4"
+(define_expand "@cbranch<mode>4"
[(set (pc)
(if_then_else (match_operator 0 "comparison_operator"
[(match_operand:BR 1 "register_operand")
--
2.31.1
