Alex Coplan <alex.cop...@arm.com> writes: > Hi Christophe, > > On 08/09/2020 10:14, Christophe Lyon wrote: >> On Mon, 17 Aug 2020 at 11:00, Alex Coplan <alex.cop...@arm.com> wrote: >> > >> > gcc/ChangeLog: >> > >> > * config/aarch64/aarch64.md >> > (*adds_<optab><ALLX:mode>_<GPI:mode>): Ensure extended operand >> > agrees with width of extension specifier. >> > (*subs_<optab><ALLX:mode>_<GPI:mode>): Likewise. >> > (*adds_<optab><ALLX:mode>_shift_<GPI:mode>): Likewise. >> > (*subs_<optab><ALLX:mode>_shift_<GPI:mode>): Likewise. >> > (*add_<optab><ALLX:mode>_<GPI:mode>): Likewise. >> > (*add_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise. >> > (*add_uxt<mode>_shift2): Likewise. >> > (*sub_<optab><ALLX:mode>_<GPI:mode>): Likewise. >> > (*sub_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise. >> > (*sub_uxt<mode>_shift2): Likewise. >> > (*cmp_swp_<optab><ALLX:mode>_reg<GPI:mode>): Likewise. >> > (*cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise. >> > >> > >> > gcc/testsuite/ChangeLog: >> > >> > * gcc.target/aarch64/adds3.c: Fix test w.r.t. new syntax. >> > * gcc.target/aarch64/cmp.c: Likewise. >> > * gcc.target/aarch64/subs3.c: Likewise. >> > * gcc.target/aarch64/subsp.c: Likewise. >> > * gcc.target/aarch64/extend-syntax.c: New test. >> > >> >> Hi, >> >> I've noticed some of the new tests fail with -mabi=ilp32: >> gcc.target/aarch64/extend-syntax.c check-function-bodies add1 >> gcc.target/aarch64/extend-syntax.c check-function-bodies add3 >> gcc.target/aarch64/extend-syntax.c check-function-bodies sub2 >> gcc.target/aarch64/extend-syntax.c check-function-bodies sub3 >> gcc.target/aarch64/extend-syntax.c scan-assembler-times >> subs\tx[0-9]+, x[0-9]+, w[0-9]+, sxtw 3 1 >> gcc.target/aarch64/subsp.c scan-assembler sub\tsp, sp, w[0-9]*, sxtw 4\n >> >> Christophe > > AFAICT the second scan-assembler in that subsp test failed on ILP32 > before my commit. This is because we generate slightly suboptimal code > here. On LP64 with -O, we get: > > f2: > stp x29, x30, [sp, -16]! > mov x29, sp > add w1, w1, 1 > sub sp, sp, x1, sxtw 4 > mov x0, sp > bl foo > mov sp, x29 > ldp x29, x30, [sp], 16 > ret > > On ILP32, we get: > > f2: > stp x29, x30, [sp, -16]! > mov x29, sp > add w1, w1, 1 > lsl w1, w1, 4 > sub sp, sp, x1 > mov w0, wsp > bl foo > mov sp, x29 > ldp x29, x30, [sp], 16 > ret > > And we see similar results all the way back to GCC 6. So AFAICT this > scan-assembler has never worked. The attached patch disables it on ILP32 > since this isn't a code quality regression. > > This patch also fixes up the DejaGnu directives in extend-syntax.c to > work on ILP32: we change the check-function-bodies directive to only run > on LP64, adding scan-assembler directives for ILP32 where required. > > OK for trunk?
OK, thanks. Sorry for the slow review. Richard
