On Thu, Sep 24, 2020 at 10:24:52AM +0200, Florian Weimer wrote:
> * Michael Meissner via Gcc-patches:
>
> > These patches are my latest versions of the patches to add IEEE 128-bit min,
> > max, and conditional move to GCC. They correspond to the earlier patches #3
> > and #4 (patches #1 and #2 have been installed).
>
> Is this about IEEE min or IEEE minimum? My understanding is that they
> are not the same (or that the behavior depends on the standard version,
> but I think min was replaced with minimum in the 2019 standard or
> something like that).
>
> Thanks,
> Florian
The ISA 3.0 added 2 min/max variants to add to the original variant in power7
(ISA 2.6).
xsmaxdp Maximum value
xsmaxcdp Maximum value with "C" semantics
xsmaxjdp Maximum value with "Java" semantics
Due to the NaN rules, unless you use -ffast-math, the compiler won't generate
these by default. However with the compare and set mask instruction that was
also introduced in ISA 3.0, the compiler can use compare and set mask to
implement maximum and minimum in some cases, that would return the 'right'
value with NaNs.
In ISA 3.1 (power10) the decision was made to only provide the "C" form on
maximum and minimum. Hence the test in the first patch that uses -ffast-math
to get XSMAXCQP generated. The second patch adds the conditional move support,
which like for SF/DF modes, can generate maximum and minimums in some cases.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797
