On Mon, Aug 3, 2020 at 2:20 AM Richard Biener via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> On Sun, Aug 2, 2020 at 6:31 PM Roger Sayle <ro...@nextmovesoftware.com> wrote:
> >
> >
> >
> > PR rtl-optimization/60473 was a code quality regression that has
> >
> > been cured by improvements to register allocation. For the function
> >
> > in the test case, GCC 4.4, 4.5 and 4.6 generated very poor code
> >
> > requiring two mov instructions:
> >
> >
> >
> > foo: rdtsc
> >
> > mov rcx, rax
> >
> > mov rax, rdx
> >
> > sal rax, 32
> >
> > or rax, rcx
> >
> > ret
> >
> >
> >
> > GCC 4.7 and 4.8 (when the PR was filed) produced better but
> >
> > still poor code with one mov instruction:
> >
> >
> >
> > foo: rtdsc
> >
> > sal rdx, 32
> >
> > or rdx, rax
> >
> > mov rax, rdx
> >
> > ret
> >
> >
> >
> > Since GCC 4.9 (including current mainline), it generates optimal
> >
> > code with no mov instructions, matching what used to be generated
> >
> > in GCC 4.1.
> >
> >
> >
> > foo: rdtsc
> >
> > sal rdx, 32
> >
> > or rax, rdx
> >
> > ret
> >
> >
> >
> > This test case, which has been tested on x86_64-pc-linux-gnu,
> >
> > simply checks that we don't regress again in future.
> >
> > Ok for mainline?
>
> I think you need to restrict this to lp64, at least it fails for me with -m32.
> It also passes with -mx32 but not sure how the perfect target selector
> would look like.
/* { dg-do compile { target { ! ia32 } } } */
> Otherwise looks OK.
>
> Richard.
>
--
H.J.
