On 6/19/20 11:47 AM, Peter Bergner wrote: >>> +;; Special pattern to prevent DSE from generating an internal error if it >>> +;; notices a structure copy that it wants to eliminate. This generates >>> pretty >>> +;; bad code, but at least it doesn't die. >>> +(define_insn_and_split "truncpoidi2" >> >> Could you say *why*/*how* it prevents the ICE here? > > This was added by Mike. I didn't debug the issue. Mike, do you have > some verbiage we could add here?
So this pattern was added earlier in our implementation of these built-ins. For kicks, I removed the pattern to recreate the ICE we saw before so I could describe the ICE like you wanted. However, the ICE we were seeing in convert_mode_scalar() is gone. In fact, we don't call convert_mode_scalar anymore for the test case that used to ICE, so our implementation since then seems to have obviated the need for the pattern at all, so I have removed it! >>> + /* MMA accumulator modes need FPR registers divisible by 4. We need to >>> allow >>> + XImode to have the same registers as PXImode, even though we do not >>> enable >>> + the move pattern for XImode. */ >>> + if (mode == PXImode || mode == XImode) >>> + return (TARGET_MMA && FP_REGNO_P (regno) >>> + && (regno & 3) == 0); [snip] >> Why are OImode and XImode handled here? So I tried removing OImode and XImode here and things broke badly, so we do need them. Without them, we end up generating uses of OImode in our rtl, even with the OImode move pattern being disabled. With OImode added, we get no OImode uses at all (what we want). Mike said this has to do with implicit assumptions within GCC going all of the way back to the beginning of GCC development. Yeah, kind of vague. His existing comment does say we need them here though. I made the rest of your suggested changes and pushed the patch. Thanks! Peter
