On Mon, 2020-06-15 at 14:56 -0500, Peter Bergner via Gcc-patches wrote:
> This patch adds the new -mmma option as well as the initial MMA
> support,
> which includes the target specific __vector_pair and __vector_quad
> types,
> the POImode and PXImode partial integer modes they are mapped to, and
> their
> associated  move patterns.  Support for the restrictions on the
> registers
> these modes can be assigned to as also been added.
> 
> This patch passed bootstrap and regtesting with no regressions on
> powerpc64le-linux.  Ok for trunk?
> 
> Peter
> 
> 2020-06-15  Peter Bergner  <berg...@linux.ibm.com>
>           Michael Meissner  <meiss...@linux.ibm.com>
> 
> gcc/
>       * config/rs6000/mma.md: New file.
>       * config/rs6000/rs6000-c.c (rs6000_target_modify_macros):
> Define
>       __MMA__ for mma.
>       * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add
> support
>       for __vector_pair and __vector_quad types.
>       * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
>       OPTION_MASK_MMA.
>       (POWERPC_MASKS): Likewise.

Don't see POWERPC_MASKS in the patch here.


>       * config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
>       (POI, PXI): New partial integer modes.
>       * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
>       (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
>       (rs6000_hard_regno_mode_ok_uncached): Likewise.
>       Add support for POImode being allowed in VSX registers and
> PXImode
>       being allowed in FP registers.
>       (rs6000_modes_tieable_p): Adjust comment.
>       Add support for POImode and PXImode.
>       (rs6000_debug_reg_global) <print_tieable_modes>: Add OImode,
> POImode
>       XImode and PXImode.
>       (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
>       Set up appropriate addr_masks for vector pair and vector quad
> addresses.
>       (rs6000_init_hard_regno_mode_ok): Add support for vector pair
> and
>       vector quad registers.  Setup reload handlers for POImode and
> PXImode.
>       (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA
>       and RS6000_BTM_FUTURE.
>       (rs6000_option_override_internal): Error if -mmma is specified
>       without -mcpu=future.
>       (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
>       (quad_address_p): Change size test to less than 16 bytes.
>       (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector
> pair
>       and vector quad instructions.
>       (avoiding_indexed_address_p): Likewise.
>       (rs6000_emit_move): Disallow POImode and PXImode moves
> involving
>       constants.
>       (rs6000_preferred_reload_class): Prefer VSX registers for
> POImode
>       and FP registers for PXImode.
>       (rs6000_split_multireg_move): Support splitting POImode and
> PXImode
>       move instructions.  Insert xxmtacc and xxmfacc instructions
> when
>       setting a PXImode register and reading a PXImode register
> respectively.
>       (rs6000_mangle_type): Adjust comment.  Add support for mangling
>       __vector_pair and __vector_quad types.
>       (rs6000_opt_masks): Add entry for mma.
>       (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and
> RS6000_BTM_FUTURE.
>       (rs6000_function_value): Use VECTOR_ALIGNMENT_P.
>       (address_to_insn_form): Likewise.
>       (reg_to_non_prefixed): Likewise.
>       (rs6000_invalid_conversion): New function.
>       * config/rs6000/rs6000.h (MASK_MMA): Define.
>       (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
>       (VECTOR_ALIGNMENT_P): New helper macro.
>       (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
>       (RS6000_BTM_MMA): Define.
>       (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
>       (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
>       RS6000_BTI_vector_quad.
>       (vector_pair_type_node): Define.
>       (vector_quad_type_node): Likewise.
>       * config/rs6000/rs6000.md (define_attr "isa"): Add mma.
>       (define_attr "enabled"): Handle mma.
>       (define_mode_iterator RELOAD): Add POI and PXI.
>       Include mma.md.
>       * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
>       * config/rs6000/rs6000.opt (-mmma): New.
>       * doc/invoke.texi: Document -mmma.

The rest of the Changelog looks to match the contents.   ok.


> 
> diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
> new file mode 100644
> index 00000000000..b35a15a2be1
> --- /dev/null
> +++ b/gcc/config/rs6000/mma.md
> @@ -0,0 +1,128 @@
> +;; Vector Quad, Vector Pair, and MMA patterns.
> +;; Copyright (C) 2020 Free Software Foundation, Inc.
> +;; Contributed by Peter Bergner <berg...@linux.ibm.com> and
> +;;             Michael Meissner <meiss...@linux.ibm.com>
> +
> +;; This file is part of GCC.
> +
> +;; GCC is free software; you can redistribute it and/or modify it
> +;; under the terms of the GNU General Public License as published
> +;; by the Free Software Foundation; either version 3, or (at your
> +;; option) any later version.
> +
> +;; GCC is distributed in the hope that it will be useful, but
> WITHOUT
> +;; ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY
> +;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
> +;; License for more details.
> +
> +;; You should have received a copy of the GNU General Public License
> +;; along with GCC; see the file COPYING3.  If not see
> +;; <http://www.gnu.org/licenses/>.
> +
> +;; Vector load/store pair operations

Probably clear later on.  First blush and first pass a blurb here to
clarify MMA, and what the modes are may be useful.

The subsection paragraph from the extend.texi may be a good fit).


> +;; We need to define an OImode move pattern, even though we don't
> enable it,
> +;; because the machine independent parts of the compiler at times
> uses the
> +;; large integer modes.
> +;;
> +;; If we enable movoi, the compiler will try and use
> it.  Unfortunately, if it
> +;; is enabled, it will cause problems on little endian systems with
> code that
> +;; uses the vector_size attribute, due to endian issues.

So, maybe rearrange as two lines?

Define a (disabled) OImode move pattern so the machine independent
parts of the compare can use the large integer modes.
FIXME: If the OImove pattern is enabled, LE systems will have problems
with the vector_size attribute.


> +(define_expand "movoi"
> +  [(set (match_operand:OI 0 "nonimmediate_operand")
> +     (match_operand:OI 1 "input_operand"))]
> +  "0"
> +{
> +  gcc_unreachable ();
> +})

Is it the "0" or the _unreachable() that 'disables' this? 


I've read through the rest of this, nothing else jumped out at me. 

thanks
-Will



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