This patch adds PC-relative tests for -mcpu=future.
This is patch #6 of 7. I have checked this on a little endian power8 system
running Linux, and all tests passed. Can I check this into the GCC 10 trunk?
2020-04-27 Michael Meissner <meiss...@linux.ibm.com>
* gcc.target/powerpc/prefix-pcrel.h: New set of tests to test
prefixed addressing on 'future' system with PC-relative addresses
for various types.
* gcc.target/powerpc/prefix-pcrel-dd.c: New test for prefixed
loads/stores with PC-relative addresses for the _Decimal64 type.
* gcc.target/powerpc/prefix-pcrel-df.c: New test for prefixed
loads/stores with PC-relative addresses for the double type.
* gcc.target/powerpc/prefix-pcrel-di.c: New test for prefixed
loads/stores with PC-relative addresses for the long type.
* gcc.target/powerpc/prefix-pcrel-hi.c: New test for prefixed
loads/stores with PC-relative addresses for the short type.
* gcc.target/powerpc/prefix-pcrel-kf.c: New test for prefixed
loads/stores with PC-relative addresses for the __float128 type.
* gcc.target/powerpc/prefix-pcrel-qi.c: New test for prefixed
loads/stores with PC-relative addresses for the signed char type.
* gcc.target/powerpc/prefix-pcrel-sd.c: New test for prefixed
loads/stores with PC-relative addresses for the _Decimal32 type.
* gcc.target/powerpc/prefix-pcrel-sf.c: New test for prefixed
loads/stores with PC-relative addresses for the float type.
* gcc.target/powerpc/prefix-pcrel-si.c: New test for prefixed
loads/stores with PC-relative addresses for the int type.
* gcc.target/powerpc/prefix-pcrel-udi.c: New test for prefixed
loads/stores with PC-relative addresses for the unsigned long
type.
* gcc.target/powerpc/prefix-pcrel-uhi.c: New test for prefixed
loads/stores with PC-relative addresses for the unsigned short
type.
* gcc.target/powerpc/prefix-pcrel-uqi.c: New test for prefixed
loads/stores with PC-relative addresses for the unsigned char
type.
* gcc.target/powerpc/prefix-pcrel-usi.c: New test for prefixed
loads/stores with PC-relative addresses for the unsigned int
type.
* gcc.target/powerpc/prefix-pcrel-v2df.c: New test for prefixed
loads/stores with PC-relative addresses for the vector double
type.
--- /tmp/61oqzU_prefix-pcrel-dd.c 2020-04-27 14:11:22.981249397 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c 2020-04-27
14:11:22.751252547 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the _Decimal64 type. */
+
+#define TYPE _Decimal64
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {[@]pcrel} 4 } } */
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
--- /tmp/w5tyiy_prefix-pcrel-df.c 2020-04-27 14:11:22.990249274 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c 2020-04-27
14:11:22.755252492 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the double type. */
+
+#define TYPE double
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {[@]pcrel} 4 } } */
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
--- /tmp/uE672b_prefix-pcrel-di.c 2020-04-27 14:11:22.998249164 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c 2020-04-27
14:11:22.759252437 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the long type. */
+
+#define TYPE long
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {[@]pcrel} 4 } } */
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
--- /tmp/UHt8OP_prefix-pcrel-hi.c 2020-04-27 14:11:23.005249069 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c 2020-04-27
14:11:22.763252383 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the short type. */
+
+#define TYPE short
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {[@]pcrel} 4 } } */
+/* { dg-final { scan-assembler-times {\mplh[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
--- /tmp/046sCt_prefix-pcrel-kf.c 2020-04-27 14:11:23.012248973 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c 2020-04-27
14:11:22.767252328 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the __float128 type. */
+
+#define TYPE __float128
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {[@]pcrel} 4 } } */
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
--- /tmp/gZkfr7_prefix-pcrel-qi.c 2020-04-27 14:11:23.020248863 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c 2020-04-27
14:11:22.771252273 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the signed char type. */
+
+#define TYPE signed char
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {[@]pcrel} 4 } } */
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
--- /tmp/KUJshL_prefix-pcrel-sd.c 2020-04-27 14:11:23.028248754 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c 2020-04-27
14:11:22.774252232 -0400
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the _Decimal32 type. Note, the _Decimal32
+ type will not generate any prefixed load or stores, because there is no
+ prefixed load/store instruction to load up a vector register as a zero
+ extended 32-bit integer. So we count the number load addresses that are
+ generated. */
+
+#define TYPE _Decimal32
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {[@]pcrel} 3 } } */
+/* { dg-final { scan-assembler-times {\mpla\M} 3 } } */
--- /tmp/eMi78o_prefix-pcrel-sf.c 2020-04-27 14:11:23.035248658 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c 2020-04-27
14:11:22.778252177 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the float type. */
+
+#define TYPE float
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {[@]pcrel} 4 } } */
+/* { dg-final { scan-assembler-times {\mplfs\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfs\M} 2 } } */
--- /tmp/jUBb22_prefix-pcrel-si.c 2020-04-27 14:11:23.043248548 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c 2020-04-27
14:11:22.781252136 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the int type. */
+
+#define TYPE int
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {[@]pcrel} 4 } } */
+/* { dg-final { scan-assembler-times {\mplw[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
--- /tmp/p0CEWG_prefix-pcrel-udi.c 2020-04-27 14:11:23.050248452 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c 2020-04-27
14:11:22.784252095 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for unsigned long type. */
+
+#define TYPE unsigned long
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {[@]pcrel} 4 } } */
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
--- /tmp/dWjwSk_prefix-pcrel-uhi.c 2020-04-27 14:11:23.058248343 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c 2020-04-27
14:11:22.788252040 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the unsigned short type. */
+
+#define TYPE unsigned short
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {[@]pcrel} 4 } } */
+/* { dg-final { scan-assembler-times {\mplhz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
--- /tmp/xu5KPY_prefix-pcrel-uqi.c 2020-04-27 14:11:23.065248247 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c 2020-04-27
14:11:22.792251985 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the unsigned char type. */
+
+#define TYPE unsigned char
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {[@]pcrel} 4 } } */
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
--- /tmp/PlTpOC_prefix-pcrel-usi.c 2020-04-27 14:11:23.072248151 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c 2020-04-27
14:11:22.796251931 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for unsigned int type. */
+
+#define TYPE unsigned int
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {[@]pcrel} 4 } } */
+/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
--- /tmp/2P3sOg_prefix-pcrel-v2df.c 2020-04-27 14:11:23.080248042 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c 2020-04-27
14:11:22.800251876 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the vector double type. */
+
+#define TYPE vector double
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {[@]pcrel} 4 } } */
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
--- /tmp/mOOQPU_prefix-pcrel.h 2020-04-27 14:11:23.087247946 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h 2020-04-27
14:11:22.803251835 -0400
@@ -0,0 +1,58 @@
+/* Common tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for each type. */
+
+typedef signed char schar;
+typedef unsigned char uchar;
+typedef unsigned short ushort;
+typedef unsigned int uint;
+typedef unsigned long ulong;
+typedef long double ldouble;
+typedef vector double v2df;
+typedef vector long v2di;
+typedef vector float v4sf;
+typedef vector int v4si;
+
+#ifndef TYPE
+#define TYPE ulong
+#endif
+
+#ifndef ITYPE
+#define ITYPE TYPE
+#endif
+
+#ifndef OTYPE
+#define OTYPE TYPE
+#endif
+
+static TYPE a;
+TYPE *p = &a;
+
+#if !defined(DO_ADD) && !defined(DO_VALUE) && !defined(DO_SET)
+#define DO_ADD 1
+#define DO_VALUE 1
+#define DO_SET 1
+#endif
+
+#if DO_ADD
+void
+add (TYPE b)
+{
+ a += b;
+}
+#endif
+
+#if DO_VALUE
+OTYPE
+value (void)
+{
+ return (OTYPE)a;
+}
+#endif
+
+#if DO_SET
+void
+set (ITYPE b)
+{
+ a = (TYPE)b;
+}
+#endif
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797
