This patch adds tests for -mcpu=future generating prefixed load/store
instructions with large numeric offsets.
This is patch #5 of 7. This patch was tested on a little endian power8 system
running Linux, and the tests passed. Can I check this into GCC 10?
2020-04-27 Michael Meissner <meiss...@linux.ibm.com>
* gcc.target/powerpc/prefix-large.h: New set of tests to test
prefixed addressing on 'future' system with large numeric offsets
for various types.
* gcc.target/powerpc/prefix-large-dd.c: New test for prefixed
loads/stores with large offsets for the _Decimal64 type.
* gcc.target/powerpc/prefix-large-df.c: New test for prefixed
loads/stores with large offsets for the double type.
* gcc.target/powerpc/prefix-large-di.c: New test for prefixed
loads/stores with large offsets for the long type.
* gcc.target/powerpc/prefix-large-hi.c: New test for prefixed
loads/stores with large offsets for the short type.
* gcc.target/powerpc/prefix-large-kf.c: New test for prefixed
loads/stores with large offsets for the __float128 type.
* gcc.target/powerpc/prefix-large-qi.c: New test for prefixed
loads/stores with large offsets for the signed char type.
* gcc.target/powerpc/prefix-large-sd.c: New test for prefixed
loads/stores with large offsets for the _Decimal32 type.
* gcc.target/powerpc/prefix-large-sf.c: New test for prefixed
loads/stores with large offsets for the float type.
* gcc.target/powerpc/prefix-large-si.c: New test for prefixed
loads/stores with large offsets for the int type.
* gcc.target/powerpc/prefix-large-udi.c: New test for prefixed
loads/stores with large offsets for the unsigned long type.
* gcc.target/powerpc/prefix-large-uhi.c: New test for prefixed
loads/stores with large offsets for the unsigned short type.
* gcc.target/powerpc/prefix-large-uqi.c: New test for prefixed
loads/stores with large offsets for the unsigned char type.
* gcc.target/powerpc/prefix-large-usi.c: New test for prefixed
loads/stores with large offsets for the unsigned int type.
* gcc.target/powerpc/prefix-large-v2df.c: New test for prefixed
loads/stores with large offsets for the vector double type.
--- /tmp/ky2ZAZ_prefix-large-dd.c 2020-04-27 14:05:05.638417056 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c 2020-04-27
14:05:05.406420175 -0400
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for _Decimal64 objects. */
+
+#define TYPE _Decimal64
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
--- /tmp/HDrUG4_prefix-large-df.c 2020-04-27 14:05:05.647416935 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-large-df.c 2020-04-27
14:05:05.411420108 -0400
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for double objects. */
+
+#define TYPE double
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
--- /tmp/eqa8N9_prefix-large-di.c 2020-04-27 14:05:05.654416841 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-large-di.c 2020-04-27
14:05:05.415420054 -0400
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for long objects. */
+
+#define TYPE long
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
--- /tmp/jLewWe_prefix-large-hi.c 2020-04-27 14:05:05.660416760 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c 2020-04-27
14:05:05.419420000 -0400
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for short objects. */
+
+#define TYPE short
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplh[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
--- /tmp/ea0a6j_prefix-large-kf.c 2020-04-27 14:05:05.666416679 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c 2020-04-27
14:05:05.423419946 -0400
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for __float128 objects. */
+
+#define TYPE __float128
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
--- /tmp/7Ko4gp_prefix-large-qi.c 2020-04-27 14:05:05.673416585 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c 2020-04-27
14:05:05.426419906 -0400
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for signed char objects. */
+
+#define TYPE signed char
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
--- /tmp/Tl8etu_prefix-large-sd.c 2020-04-27 14:05:05.680416491 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c 2020-04-27
14:05:05.430419852 -0400
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for _Decimal32 objects. */
+
+#define TYPE _Decimal32
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpaddi\M|\mpli|\mpla\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mlfiwzx\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mstfiwx\M} 2 } } */
+
+
--- /tmp/KbsIGz_prefix-large-sf.c 2020-04-27 14:05:05.687416397 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c 2020-04-27
14:05:05.434419799 -0400
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for float objects. */
+
+#define TYPE float
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfs\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfs\M} 2 } } */
--- /tmp/AsuuVE_prefix-large-si.c 2020-04-27 14:05:05.693416315 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-large-si.c 2020-04-27
14:05:05.438419745 -0400
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for int objects. */
+
+#define TYPE int
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplw[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
--- /tmp/RO8CbK_prefix-large-udi.c 2020-04-27 14:05:05.701416205 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c 2020-04-27
14:05:05.441419704 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for unsigned long
+ objects. */
+
+#define TYPE unsigned long
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
--- /tmp/2Dy8sP_prefix-large-uhi.c 2020-04-27 14:05:05.708416109 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c 2020-04-27
14:05:05.445419651 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for unsigned short
+ objects. */
+
+#define TYPE unsigned short
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplhz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
--- /tmp/XKp5LU_prefix-large-uqi.c 2020-04-27 14:05:05.716416000 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c 2020-04-27
14:05:05.449419597 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for unsigned char
+ objects. */
+
+#define TYPE unsigned char
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
--- /tmp/XSeo6Z_prefix-large-usi.c 2020-04-27 14:05:05.723415904 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c 2020-04-27
14:05:05.453419543 -0400
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for unsigned int
+ objects. */
+
+#define TYPE unsigned int
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
--- /tmp/skm5r5_prefix-large-v2df.c 2020-04-27 14:05:05.730415808 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c 2020-04-27
14:05:05.457419489 -0400
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for vector objects. */
+
+#define TYPE vector double
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
--- /tmp/1H98Oa_prefix-large.h 2020-04-27 14:05:05.737415712 -0400
+++ gcc/testsuite/gcc.target/powerpc/prefix-large.h 2020-04-27
14:05:05.461419436 -0400
@@ -0,0 +1,59 @@
+/* Common tests for prefixed instructions testing whether we can generate a
+ 34-bit offset using 1 instruction. */
+
+typedef signed char schar;
+typedef unsigned char uchar;
+typedef unsigned short ushort;
+typedef unsigned int uint;
+typedef unsigned long ulong;
+typedef long double ldouble;
+typedef vector double v2df;
+typedef vector long v2di;
+typedef vector float v4sf;
+typedef vector int v4si;
+
+#ifndef TYPE
+#define TYPE ulong
+#endif
+
+#ifndef ITYPE
+#define ITYPE TYPE
+#endif
+
+#ifndef OTYPE
+#define OTYPE TYPE
+#endif
+
+#if !defined(DO_ADD) && !defined(DO_VALUE) && !defined(DO_SET)
+#define DO_ADD 1
+#define DO_VALUE 1
+#define DO_SET 1
+#endif
+
+#ifndef CONSTANT
+#define CONSTANT 0x123450UL
+#endif
+
+#if DO_ADD
+void
+add (TYPE *p, TYPE a)
+{
+ p[CONSTANT] += a;
+}
+#endif
+
+#if DO_VALUE
+OTYPE
+value (TYPE *p)
+{
+ return p[CONSTANT];
+}
+#endif
+
+#if DO_SET
+void
+set (TYPE *p, ITYPE a)
+{
+ p[CONSTANT] = a;
+}
+#endif
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797
