"H.J. Lu" <hjl.to...@gmail.com> writes: > To support it, we disable > MMX by default in 64-bit mode so that MMX registers won't be available
Wouldn't that break inline assembler that references MMX register clobbers? -Andi
- [PATCH 37/46] i386: Emulate MMX abs<mode>2 with SSE H.J. Lu
- [PATCH 39/46] i386: Allow MMX vector expanders with SSE H.J. Lu
- [PATCH 43/46] i386: Enable 8-byte vectorizer for TARGET_MMX... H.J. Lu
- [PATCH 38/46] i386: Allow MMXMODE moves without MMX H.J. Lu
- [PATCH 42/46] i386: Also enable SSSE3 __m64 tests without M... H.J. Lu
- [PATCH 40/46] i386: Don't enable MMX in 64-bit mode by defa... H.J. Lu
- [PATCH 46/46] i386: Implement V2SF comparisons with SSE H.J. Lu
- [PATCH 41/46] i386: Add tests for MMX intrinsic emulations ... H.J. Lu
- [PATCH 16/46] i386: Emulate MMX pshufw with SSE H.J. Lu
- [PATCH 11/46] i386: Emulate MMX ashr<mode>3/<shift... H.J. Lu
- Re: [PATCH 00/46] Implement MMX intrinsics with SSE Andi Kleen
- Re: [PATCH 00/46] Implement MMX intrinsics with SSE Florian Weimer
- Re: [PATCH 00/46] Implement MMX intrinsics with SSE Uros Bizjak
- Re: [PATCH 00/46] Implement MMX intrinsics with SSE Richard Biener
- Re: [PATCH 00/46] Implement MMX intrinsics with SS... Jakub Jelinek
- Re: [PATCH 00/46] Implement MMX intrinsics with SS... Uros Bizjak
