On Mon, Sep 24, 2018 at 9:55 AM, Jan Hubicka <hubi...@ucw.cz> wrote:
>> On Mon, Sep 24, 2018 at 9:50 AM, Jan Hubicka <hubi...@ucw.cz> wrote:
>> >> On Mon, Sep 24, 2018 at 9:19 AM, Jan Hubicka <hubi...@ucw.cz> wrote:
>> >> >> >> PING.
>> >> >> >
>> >> >> > Hi, Jan Uros,
>> >> >> >
>> >> >> > Can you review this patch?
>> >> >>
>> >> >> I don't know CET stuff, so I'm not able to review functionality of CET 
>> >> >> patches.
>> >> >
>> >> > My (very partial) understanding is that ENDBR is used to mark places 
>> >> > where one
>> >> > can jump/call. So we need to always arrange it first. Normally this is 
>> >> > done
>> >> > simply by inserting it very first in the instruction stream, but in 
>> >> > cases
>> >> > where profiling code is inserted this breaks because profiling code is
>> >> > output as string rather than real instructions because it needs the 
>> >> > code label
>> >> > to be referred from mloc_count section.
>> >> >
>> >> > It is ugly, I wonder how much work would be tu turn profiler insertion 
>> >> > to also
>> >> > use RTL representation?
>> >> >
>> >>
>> >> We will investigate it.
>> > Thanks, do we need to backport this fix into release braches?
>> > (I think current patch is more suitable for backporting)
>>
>> Yes, we need to backport it to GCC 8 branch.
>
> OK, then I guess the patch is fine for mainline and for branch after a week
> (I am not sure how much of practical CET testing we have though). Please 
> however
> investigate the cleanup for the profiler code. It is not first time it hit us
> and it would be nice to have less code output to function bodies that is not
> visible to RTL passes.
>

This is the patch I checked into trunk.  I will backport it to GCC 8 branch
next Monday.  I also opened:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87419

to improve -mfentry.

Thanks.

-- 
H.J.
From 267e0f92b0d5f1c7900901b20fe576218fc867fc Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.to...@gmail.com>
Date: Thu, 19 Jul 2018 14:23:03 -0700
Subject: [PATCH] Add VALID_AVX512FP16_REG_MODE

---
 gcc/config/i386/i386.c | 5 +++++
 gcc/config/i386/i386.h | 3 +++
 2 files changed, 8 insertions(+)

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index a8530eccc73..ae6b4e1bf06 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -8506,6 +8506,7 @@ function_arg_advance_64 (CUMULATIVE_ARGS *cum, machine_mode mode,
 
   /* Unnamed 512 and 256bit vector mode parameters are passed on stack.  */
   if (!named && (VALID_AVX512F_REG_MODE (mode)
+		 || (TARGET_AVX512FP16 && VALID_AVX512FP16_REG_MODE (mode))
 		 || VALID_AVX256_REG_MODE (mode)))
     return 0;
 
@@ -40286,6 +40287,7 @@ ix86_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
       if (TARGET_AVX512F
 	  && (mode == XImode
 	      || VALID_AVX512F_REG_MODE (mode)
+	      || (TARGET_AVX512FP16 && VALID_AVX512FP16_REG_MODE (mode))
 	      || VALID_AVX512F_SCALAR_MODE (mode)))
 	return true;
 
@@ -40480,6 +40482,7 @@ ix86_set_reg_reg_cost (machine_mode mode)
     case MODE_VECTOR_INT:
     case MODE_VECTOR_FLOAT:
       if ((TARGET_AVX512F && VALID_AVX512F_REG_MODE (mode))
+	  || (TARGET_AVX512FP16 && VALID_AVX512FP16_REG_MODE (mode))
 	  || (TARGET_AVX && VALID_AVX256_REG_MODE (mode))
 	  || (TARGET_SSE2 && VALID_SSE2_REG_MODE (mode))
 	  || (TARGET_SSE && VALID_SSE_REG_MODE (mode))
@@ -44501,6 +44504,8 @@ ix86_vector_mode_supported_p (machine_mode mode)
     return true;
   if (TARGET_AVX && VALID_AVX256_REG_MODE (mode))
     return true;
+  if (TARGET_AVX512FP16 && VALID_AVX512FP16_REG_MODE (mode))
+    return true;
   if (TARGET_AVX512F && VALID_AVX512F_REG_MODE (mode))
     return true;
   if (TARGET_MMX && VALID_MMX_REG_MODE (mode))
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 44cf5ac9847..86bff61140c 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -1131,6 +1131,9 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
 #define VALID_AVX512F_REG_OR_XI_MODE(MODE)				\
   (VALID_AVX512F_REG_MODE (MODE) || (MODE) == XImode)
 
+#define VALID_AVX512FP16_REG_MODE(MODE)					\
+  ((MODE) == V32HFmode)
+
 #define VALID_AVX512VL_128_REG_MODE(MODE)				\
   ((MODE) == V2DImode || (MODE) == V2DFmode || (MODE) == V16QImode	\
    || (MODE) == V4SImode || (MODE) == V4SFmode || (MODE) == V8HImode	\
-- 
2.17.1

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