On Wed, Sep 5, 2018 at 2:40 PM Andrew Stubbs <andrew_stu...@mentor.com> wrote: > > On 05/09/18 13:05, Richard Biener wrote: > > On Wed, Sep 5, 2018 at 1:51 PM <a...@codesourcery.com> wrote: > >> > >> > >> GCN uses V64BImode to represent vector masks in the middle-end, and DImode > >> bit-masks to represent them in the back-end. These must be converted at > >> expand > >> time and the most convenient way is to simply use a SUBREG. > > > > x86 with AVX512 uses SImode in the middle-end as well via the get_mask_mode > > vectorization target hook. Maybe you can avoid another special-case > > by piggy-backing on > > that? > > That's exactly what I wanted to do, but I found that returning > non-vector modes ran into trouble further down the road. I don't recall > the exact details now, but there were assertion failures and failures to > vectorize. > > That was in a GCC 8 codebase though, so is the AVX thing a recent change?
No. You might want to look into the x86 backend if there's maybe more tweaks needed when using non-vector mask modes. Richard. > Andrew
