aarch64_rtx_costs uses the number of registers in a mode as the basis
of SET costs. This patch makes it get the number of registers from
aarch64_hard_regno_nregs rather than repeating the calcalation inline.
Handling SVE modes in aarch64_hard_regno_nregs is then enough to get
the correct SET cost as well.
2017-10-27 Richard Sandiford <richard.sandif...@linaro.org>
Alan Hayward <alan.hayw...@arm.com>
David Sherwood <david.sherw...@arm.com>
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Use
aarch64_hard_regno_nregs to get the number of registers
in a mode.
Index: gcc/config/aarch64/aarch64.c
===================================================================
--- gcc/config/aarch64/aarch64.c 2017-10-27 14:12:11.045026014 +0100
+++ gcc/config/aarch64/aarch64.c 2017-10-27 14:12:14.533257115 +0100
@@ -7200,18 +7200,16 @@ aarch64_rtx_costs (rtx x, machine_mode m
/* The cost is one per vector-register copied. */
if (VECTOR_MODE_P (GET_MODE (op0)) && REG_P (op1))
{
- int n_minus_1 = (GET_MODE_SIZE (GET_MODE (op0)) - 1)
- / GET_MODE_SIZE (V4SImode);
- *cost = COSTS_N_INSNS (n_minus_1 + 1);
+ int nregs = aarch64_hard_regno_nregs (V0_REGNUM, GET_MODE (op0));
+ *cost = COSTS_N_INSNS (nregs);
}
/* const0_rtx is in general free, but we will use an
instruction to set a register to 0. */
else if (REG_P (op1) || op1 == const0_rtx)
{
/* The cost is 1 per register copied. */
- int n_minus_1 = (GET_MODE_SIZE (GET_MODE (op0)) - 1)
- / UNITS_PER_WORD;
- *cost = COSTS_N_INSNS (n_minus_1 + 1);
+ int nregs = aarch64_hard_regno_nregs (R0_REGNUM, GET_MODE (op0));
+ *cost = COSTS_N_INSNS (nregs);
}
else
/* Cost is just the cost of the RHS of the set. */
