On 10/03/11 16:21, Richard Sandiford wrote: > so inter-iteration dependencies aren't a problem. Whereas I thought your > modulo instruction did: > > A1 > B1 A2 > C1 B2 A3 > D1 C2 B3 > D2 C3 > D3 > > so if D1 writes to memory that A2 (but not A1) _might_ load, then the > loop doesn't behave the same way.
But sched-deps will have found a dependence between D1 and A2 so the schedule won't look like this. Bernd
