On 09/14/11 11:03, Richard Sandiford wrote: > ...I didn't see from an admittedly quick read of the patch how you > handle memory disambiguation between iterations. If a loop includes: > > lb $3,($4) > sb $5,1($4) > > then the two instructions can be reordered by normal ebb scheduling, > but the inter-iteration conflict is important for modulo scheduling.
There's nothing special to handle, I think. sched-deps should see that the ld in iteration 1 is DEP_ANTI against the sb in iteration 0 (assuming there's also an increment). Bernd
