Bernd Schmidt <[email protected]> writes:
> On 09/08/11 16:08, Richard Sandiford wrote:
>> Also, this:
>>
>> @@ -10442,7 +10495,7 @@ mips_expand_epilogue (bool sibcall_p)
>> }
>> else
>> {
>> - unsigned int regno;
>> + rtx pat;
>>
>> /* When generating MIPS16 code, the normal
>> mips_for_each_saved_gpr_and_fpr path will restore the return
>> @@ -10450,11 +10503,16 @@ mips_expand_epilogue (bool sibcall_p)
>> if (TARGET_MIPS16
>> && !GENERATE_MIPS16E_SAVE_RESTORE
>> && BITSET_P (frame->mask, RETURN_ADDR_REGNUM))
>> - regno = GP_REG_FIRST + 7;
>> + {
>> + rtx reg = gen_rtx_REG (Pmode, GP_REG_FIRST + 7);
>> + pat = gen_return_internal (reg);
>> + }
>> else
>> - regno = RETURN_ADDR_REGNUM;
>> - emit_jump_insn (gen_simple_return_internal (gen_rtx_REG (Pmode,
>> - regno)));
>> + {
>> + rtx reg = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM);
>> + pat = gen_simple_return_internal (reg);
>> + }
>> + emit_jump_insn (pat);
>> }
>> }
>>
>> looks like a logically separate change. I'm not sure I understand
>> why it's needed: both returns are simple returns in the rtx sense.
>
> Should have explained that bit - it's needed only with shrink-wrapping.
> If we find that the epilogue ends in a simple_return, and we need
> conditional simple_returns elsewhere and don't have a pattern for them,
> we try to reuse the epilogue's simple_return by placing a label in
> front of it and redirecting these conditional simple_returns there. This
> doesn't work if we need to use different return registers, and a simple
> way to prevent it is to make the last insn look like a normal return
> instead.
Ah! Yeah. So this part is OK on its own with a comment like:
/* simple_returns cannot rely on values that are only available
on paths through the epilogue (because return paths that do
not pass through the epilogue may nevertheless reuse a
simple_return that occurs at the end of the epilogue).
Use a normal return here instead. */
rtx reg = gen_rtx_REG (Pmode, GP_REG_FIRST + 7);
pat = gen_return_internal (reg);
Thanks,
Richard
