This is what I've bootstrapped and regression tested on
powerpc64le-linux. I'm using Peter's testcases from this thread
rather than the one in the original patch submission, because that one
relies on -O0 not reducing the function down to a nop. OK to apply?
PR target/71733
gcc/
* config/rs6000/rs6000.c (rs6000_option_override_internal): Deal
with p9_vector override before power9-dform override.
gcc/testsuite/
* gcc.target/powerpc/p9-novsx.c: New.
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 99a2e36..63655b1 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -4256,6 +4256,14 @@ rs6000_option_override_internal (bool global_init_p)
&& !(rs6000_isa_flags_explicit & OPTION_MASK_TOC_FUSION))
rs6000_isa_flags |= OPTION_MASK_TOC_FUSION;
+ /* ISA 3.0 vector instructions include ISA 2.07. */
+ if (TARGET_P9_VECTOR && !TARGET_P8_VECTOR)
+ {
+ if (rs6000_isa_flags_explicit & OPTION_MASK_P8_VECTOR)
+ error ("-mpower9-vector requires -mpower8-vector");
+ rs6000_isa_flags &= ~OPTION_MASK_P9_VECTOR;
+ }
+
/* -mpower9-dform turns on both -mpower9-dform-scalar and
-mpower9-dform-vector. */
if (TARGET_P9_DFORM_BOTH > 0)
@@ -4298,14 +4306,6 @@ rs6000_option_override_internal (bool global_init_p)
rs6000_isa_flags &= ~OPTION_MASK_P9_DFORM_SCALAR;
}
- /* ISA 3.0 vector instructions include ISA 2.07. */
- if (TARGET_P9_VECTOR && !TARGET_P8_VECTOR)
- {
- if (rs6000_isa_flags_explicit & OPTION_MASK_P8_VECTOR)
- error ("-mpower9-vector requires -mpower8-vector");
- rs6000_isa_flags &= ~OPTION_MASK_P9_VECTOR;
- }
-
/* There have been bugs with -mvsx-timode that don't show up with -mlra,
but do show up with -mno-lra. Given -mlra will become the default once
PR 69847 is fixed, turn off the options with problems by default if
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-novsx.c
b/gcc/testsuite/gcc.target/powerpc/p9-novsx.c
new file mode 100644
index 0000000..7e41030
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/p9-novsx.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } {
"-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -mno-vsx -O1" } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-final { scan-assembler-times "lvx %?v?2,%?r?3" 1 } } */
+/* { dg-final { scan-assembler-times "stvx %?v?2,%?r?3" 1 } } */
+
+/* PR target/71733. */
+typedef __attribute__ ((altivec(vector__), aligned(16))) unsigned char vec_t;
+
+vec_t
+f1 (vec_t *dst)
+{
+ return dst[1];
+}
+
+void
+f2 (vec_t *dst, vec_t src)
+{
+ dst[1] = src;
+}
--
Alan Modra
Australia Development Lab, IBM
