Hi,
A few months ago, we decided it was time to remove neon-testgen.ml
and its generated tests. I did it, just to realize too late that
some intrinsics were not covered anymore, so I reverted the removal.
This patch series performs a little bit of cleanup and adds the
missing tests to cover all what is defined in arm_neon.h for AArch32.
Globally, this consists in adding tests for:
- missing poly8 and poly16 for vreinterpret and vtst
- fp16 tests for vget_lane, vstX_lane and vreinterpret
- armv8 vrnd{,a,m,n,p,x}
- tests for poly64 and poly128 intrinsics
Some intrinsics are not covered in aarch64/advsimd-intrinsics, but in
arm/crypto: vldrq, vstrq, vaes, vsha1, vsha256, vmull_p64,
vmull_high_p64.
Patches 1-4 are cleanup.
Patch 5 adds the missing poly8 and poly16 tests for vreinterpret.
Patch 6 adds the missing tests for vtst_p8 and vtstq_p8.
Patches 7,8, 11 add the missing fp16 tests
Patch 9 adds armv8 vrnd{,a,m,n,p,x} tests
Patch 10 adds tests for poly64 and poly128 operations
I've checked the coverage by building the list of intrinsics tested
via neon-testgen.ml, the list of intrinsics defined in arm_neon.h, and
running the advsimd-intrinsics.exp tests with -save-temps to gather
the list of actually tested intrinsics.
This series partly addresses PR 70369 which I created to keep track
of these missing intrinsics tests: several AArch64 AdvSIMD intrinsics
are still missing tests.
Tested with QEMU on arm* and aarch64*, with no regression, and
several new PASSes.
OK for trunk?
Christophe
Christophe Lyon (11):
Fix typo in vreinterpret.c test comment.
We can remove useless #ifdefs from these tests: vmul, vshl and vtst.
AdvSIMD tests: be more verbose.
Add forgotten vsliq_n_u64 test.
Add missing vreinterpretq_p{8,16} tests.
Add missing vtst_p8 and vtstq_p8 tests.
Add missing vget_lane fp16 tests.
Add missing vstX_lane fp16 tests.
Add missing vrnd{,a,m,n,p,x} tests.
Add missing tests for intrinsics operating on poly64 and poly128
types.
Add missing tests for vreinterpret, operating of fp16 type.
.../aarch64/advsimd-intrinsics/arm-neon-ref.h | 13 +-
.../aarch64/advsimd-intrinsics/compute-ref-data.h | 16 +
.../aarch64/advsimd-intrinsics/p64_p128.c | 691 +++++++++++++++++++++
.../aarch64/advsimd-intrinsics/vget_lane.c | 19 +
.../gcc.target/aarch64/advsimd-intrinsics/vmul.c | 2 -
.../aarch64/advsimd-intrinsics/vreinterpret.c | 255 +++++++-
.../aarch64/advsimd-intrinsics/vreinterpret_p128.c | 160 +++++
.../aarch64/advsimd-intrinsics/vreinterpret_p64.c | 202 ++++++
.../gcc.target/aarch64/advsimd-intrinsics/vrnd.c | 16 +
.../aarch64/advsimd-intrinsics/vrndX.inc | 43 ++
.../gcc.target/aarch64/advsimd-intrinsics/vrnda.c | 16 +
.../gcc.target/aarch64/advsimd-intrinsics/vrndm.c | 16 +
.../gcc.target/aarch64/advsimd-intrinsics/vrndn.c | 16 +
.../gcc.target/aarch64/advsimd-intrinsics/vrndp.c | 16 +
.../gcc.target/aarch64/advsimd-intrinsics/vrndx.c | 16 +
.../gcc.target/aarch64/advsimd-intrinsics/vshl.c | 2 -
.../gcc.target/aarch64/advsimd-intrinsics/vsli_n.c | 1 +
.../aarch64/advsimd-intrinsics/vstX_lane.c | 105 +++-
.../gcc.target/aarch64/advsimd-intrinsics/vtst.c | 20 +-
19 files changed, 1612 insertions(+), 13 deletions(-)
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/p64_p128.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndX.inc
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c
--
1.9.1
