Hi Mike,
On Tue, May 03, 2016 at 06:39:55PM -0400, Michael Meissner wrote:
> With this patch, I enable -mlra if the user did not specify either -mlra or
> -mno-lra on the command line, and -mcpu=power9 or -mpower9-dform-vector were
> used. I also enabled -mvsx-timode if LRA was used, which also is a RELOAD
> issue, that works with LRA.
I don't like enabling LRA if the user didn't ask for it; it is a bit too
surprising. What do you do if there is -mno-lra explicitly? You can just
do the same if no-lra is implicit?
> * doc/md.texi (wO constraint): Likewise.
Everything is "likewise", that isn't very helpful. Writing big changelogs
is annoying, I totally agree, but please try a bit harder.
> --- gcc/config/rs6000/rs6000.opt
> (.../svn+ssh://meiss...@gcc.gnu.org/svn/gcc/trunk/gcc/config/rs6000)
> (revision 235831)
> +++ gcc/config/rs6000/rs6000.opt (.../gcc/config/rs6000) (working copy)
> @@ -470,8 +470,8 @@ Target RejectNegative Joined UInteger Va
> -mlong-double-<n> Specify size of long double (64 or 128 bits).
>
> mlra
> -Target Report Var(rs6000_lra_flag) Init(0) Save
> -Use LRA instead of reload.
> +Target Undocumented Mask(LRA) Var(rs6000_isa_flags)
> +Use the LRA register allocator instead of the reload register allocator.
It wasn't "undocumented" before? Why the change to a mask bit btw?
> +mpower9-dform-scalar
> +Target Report Mask(P9_DFORM_SCALAR) Var(rs6000_isa_flags)
> +Use/do not use scalar register+offset memory instructions added in ISA 3.0.
> +
> +mpower9-dform-vector
> +Target Report Mask(P9_DFORM_VECTOR) Var(rs6000_isa_flags)
> +Use/do not use vector register+offset memory instructions added in ISA 3.0.
> +
> mpower9-dform
> -Target Undocumented Mask(P9_DFORM) Var(rs6000_isa_flags)
> -Use/do not use vector and scalar instructions added in ISA 3.0.
> +Target Report Var(TARGET_P9_DFORM_BOTH) Init(-1) Save
> +Use/do not use register+offset memory instructions added in ISA 3.0.
These should probably all be undocumented, though (they're not something
users should use).
> +/* Return true if the ADDR is an acceptiable address for a quad memory
^ spelling
> + if (((addr_mask & RELOAD_REG_QUAD_OFFSET) == 0)
> + || !quad_address_p (addr, mode, false))
You can lose some parens here, i.e.
+ if ((addr_mask & RELOAD_REG_QUAD_OFFSET) == 0
+ || !quad_address_p (addr, mode, false))
Segher
