The nps400 is an arc700 with a set of extension instructions produced by
Mellanox (formally EZChip). This commit adds support for the nps400
architecture to the arc backend.
After this commit it is possible to compile using -mcpu=nps400 in order
to specialise for the nps400. Later commits add support for the
specific extension instructions.
gcc/ChangeLog:
* common/config/arc/arc-common.c (arc_handle_option): Add NPS400
support, setup defaults.
* config/arc/arc-opts.h (enum processor_type): Add NPS400.
* config/arc/arc.c (arc_init): Add NPS400 support.
* config/arc/arc.h (CPP_SPEC): Add NPS400 defines.
(TARGET_ARC700): NPS400 is also an ARC700.
* config/arc/arc.opt: Add NPS400 options to -mcpu=.
---
gcc/ChangeLog.NPS400 | 9 +++++++++
gcc/common/config/arc/arc-common.c | 4 ++++
gcc/config/arc/arc-opts.h | 1 +
gcc/config/arc/arc.c | 5 +++++
gcc/config/arc/arc.h | 5 ++++-
gcc/config/arc/arc.opt | 6 ++++++
6 files changed, 29 insertions(+), 1 deletion(-)
create mode 100644 gcc/ChangeLog.NPS400
diff --git a/gcc/common/config/arc/arc-common.c
b/gcc/common/config/arc/arc-common.c
index 64fb053..f5b9c6d 100644
--- a/gcc/common/config/arc/arc-common.c
+++ b/gcc/common/config/arc/arc-common.c
@@ -83,6 +83,10 @@ arc_handle_option (struct gcc_options *opts, struct
gcc_options *opts_set,
switch (value)
{
+ case PROCESSOR_NPS400:
+ if (! (opts_set->x_TARGET_CASE_VECTOR_PC_RELATIVE) )
+ opts->x_TARGET_CASE_VECTOR_PC_RELATIVE = 1;
+ /* Fall through */
case PROCESSOR_ARC600:
case PROCESSOR_ARC700:
if (! (opts_set->x_target_flags & MASK_BARREL_SHIFTER) )
diff --git a/gcc/config/arc/arc-opts.h b/gcc/config/arc/arc-opts.h
index 1e11ebc4..cbd7898 100644
--- a/gcc/config/arc/arc-opts.h
+++ b/gcc/config/arc/arc-opts.h
@@ -24,6 +24,7 @@ enum processor_type
PROCESSOR_ARC600,
PROCESSOR_ARC601,
PROCESSOR_ARC700,
+ PROCESSOR_NPS400,
PROCESSOR_ARCEM,
PROCESSOR_ARCHS
};
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index d60db50..ae8772e 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -649,6 +649,11 @@ arc_init (void)
tune_dflt = TUNE_ARC700_4_2_STD;
break;
+ case PROCESSOR_NPS400:
+ arc_cpu_string = "NPS400";
+ tune_dflt = TUNE_ARC700_4_2_STD;
+ break;
+
case PROCESSOR_ARCEM:
arc_cpu_string = "EM";
break;
diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
index 1c2a38d..f96bf0f 100644
--- a/gcc/config/arc/arc.h
+++ b/gcc/config/arc/arc.h
@@ -136,6 +136,8 @@ along with GCC; see the file COPYING3. If not see
%{mdsp-packa:-D__Xdsp_packa} %{mcrc:-D__Xcrc} %{mdvbf:-D__Xdvbf} \
%{mtelephony:-D__Xtelephony} %{mxy:-D__Xxy} %{mmul64: -D__Xmult32} \
%{mlock:-D__Xlock} %{mswape:-D__Xswape} %{mrtsc:-D__Xrtsc} \
+%{mcpu=NPS400:-D__NPS400__} \
+%{mcpu=nps400:-D__NPS400__} \
"
#define CC1_SPEC "\
@@ -297,7 +299,8 @@ along with GCC; see the file COPYING3. If not see
#define TARGET_ARC600 (arc_cpu == PROCESSOR_ARC600)
#define TARGET_ARC601 (arc_cpu == PROCESSOR_ARC601)
-#define TARGET_ARC700 (arc_cpu == PROCESSOR_ARC700)
+#define TARGET_ARC700 (arc_cpu == PROCESSOR_ARC700 \
+ || arc_cpu == PROCESSOR_NPS400)
#define TARGET_EM (arc_cpu == PROCESSOR_ARCEM)
#define TARGET_HS (arc_cpu == PROCESSOR_ARCHS)
#define TARGET_V2 \
diff --git a/gcc/config/arc/arc.opt b/gcc/config/arc/arc.opt
index 2227b75..14fd2a4 100644
--- a/gcc/config/arc/arc.opt
+++ b/gcc/config/arc/arc.opt
@@ -189,6 +189,12 @@ EnumValue
Enum(processor_type) String(arc700) Value(PROCESSOR_ARC700)
EnumValue
+Enum(processor_type) String(nps400) Value(PROCESSOR_NPS400)
+
+EnumValue
+Enum(processor_type) String(NPS400) Value(PROCESSOR_NPS400)
+
+EnumValue
Enum(processor_type) String(ARCEM) Value(PROCESSOR_ARCEM)
EnumValue
--
2.6.4
