This new iteration of the previous version is largely the same except
that I now no longer use configure time options to build in support
for nps400. Instead support controlled with a -mcpu=nps400 command
line switch. This change was made to mirror a similar change that was
requested when I pushed nps400 support upstream into binutils.
Most of the instructions added in this series are now in mainline
binutils, there are a few outstanding (<10) which I will return too
after this patch, but if anyone is super keen then there's a version
of binutils with full nps400 support on github:
https://github.com/EZchip/binutils
However, all of the nps400 specific tests are compile only, so a
binutils with full nps400 support should not be required in order to
test these changes.
Thanks,
Andrew
---
Andrew Burgess (7):
gcc/arc: Add support for nps400 cpu type.
gcc/arc: Replace rI constraint with r & Cm2 for ld and update insns
gcc/arc: convert some constraints to define_constraint
gcc/arc: Add support for nps400 cmem xld/xst instructions
gcc/arc: Add nps400 bitops support
gcc/arc: Mask integer 'L' operands to 32-bit
gcc/arc: Add an nps400 specific testcase
gcc/ChangeLog.NPS400 | 104 ++++++
gcc/common/config/arc/arc-common.c | 4 +
gcc/config/arc/arc-opts.h | 1 +
gcc/config/arc/arc.c | 68 +++-
gcc/config/arc/arc.h | 23 +-
gcc/config/arc/arc.md | 567 +++++++++++++++++++++++-------
gcc/config/arc/arc.opt | 18 +
gcc/config/arc/constraints.md | 86 ++++-
gcc/config/arc/predicates.md | 19 +
gcc/testsuite/ChangeLog.NPS400 | 43 +++
gcc/testsuite/gcc.target/arc/cmem-1.c | 10 +
gcc/testsuite/gcc.target/arc/cmem-2.c | 10 +
gcc/testsuite/gcc.target/arc/cmem-3.c | 10 +
gcc/testsuite/gcc.target/arc/cmem-4.c | 10 +
gcc/testsuite/gcc.target/arc/cmem-5.c | 10 +
gcc/testsuite/gcc.target/arc/cmem-6.c | 10 +
gcc/testsuite/gcc.target/arc/cmem-7.c | 26 ++
gcc/testsuite/gcc.target/arc/cmem-ld.inc | 16 +
gcc/testsuite/gcc.target/arc/cmem-st.inc | 18 +
gcc/testsuite/gcc.target/arc/extzv-1.c | 11 +
gcc/testsuite/gcc.target/arc/insv-1.c | 21 ++
gcc/testsuite/gcc.target/arc/insv-2.c | 18 +
gcc/testsuite/gcc.target/arc/movb-1.c | 13 +
gcc/testsuite/gcc.target/arc/movb-2.c | 13 +
gcc/testsuite/gcc.target/arc/movb-3.c | 13 +
gcc/testsuite/gcc.target/arc/movb-4.c | 13 +
gcc/testsuite/gcc.target/arc/movb-5.c | 13 +
gcc/testsuite/gcc.target/arc/movb_cl-1.c | 9 +
gcc/testsuite/gcc.target/arc/movb_cl-2.c | 11 +
gcc/testsuite/gcc.target/arc/movbi_cl-1.c | 9 +
gcc/testsuite/gcc.target/arc/movh_cl-1.c | 27 ++
gcc/testsuite/gcc.target/arc/movl-1.c | 17 +
gcc/testsuite/gcc.target/arc/nps400-1.c | 23 ++
33 files changed, 1109 insertions(+), 155 deletions(-)
create mode 100644 gcc/ChangeLog.NPS400
create mode 100644 gcc/testsuite/ChangeLog.NPS400
create mode 100644 gcc/testsuite/gcc.target/arc/cmem-1.c
create mode 100644 gcc/testsuite/gcc.target/arc/cmem-2.c
create mode 100644 gcc/testsuite/gcc.target/arc/cmem-3.c
create mode 100644 gcc/testsuite/gcc.target/arc/cmem-4.c
create mode 100644 gcc/testsuite/gcc.target/arc/cmem-5.c
create mode 100644 gcc/testsuite/gcc.target/arc/cmem-6.c
create mode 100644 gcc/testsuite/gcc.target/arc/cmem-7.c
create mode 100644 gcc/testsuite/gcc.target/arc/cmem-ld.inc
create mode 100644 gcc/testsuite/gcc.target/arc/cmem-st.inc
create mode 100644 gcc/testsuite/gcc.target/arc/extzv-1.c
create mode 100644 gcc/testsuite/gcc.target/arc/insv-1.c
create mode 100644 gcc/testsuite/gcc.target/arc/insv-2.c
create mode 100644 gcc/testsuite/gcc.target/arc/movb-1.c
create mode 100644 gcc/testsuite/gcc.target/arc/movb-2.c
create mode 100644 gcc/testsuite/gcc.target/arc/movb-3.c
create mode 100644 gcc/testsuite/gcc.target/arc/movb-4.c
create mode 100644 gcc/testsuite/gcc.target/arc/movb-5.c
create mode 100644 gcc/testsuite/gcc.target/arc/movb_cl-1.c
create mode 100644 gcc/testsuite/gcc.target/arc/movb_cl-2.c
create mode 100644 gcc/testsuite/gcc.target/arc/movbi_cl-1.c
create mode 100644 gcc/testsuite/gcc.target/arc/movh_cl-1.c
create mode 100644 gcc/testsuite/gcc.target/arc/movl-1.c
create mode 100644 gcc/testsuite/gcc.target/arc/nps400-1.c
--
2.6.4
