Forgot to add the reload cases. Here it is the updated patch.
//Claudiu
gcc/
2016-04-18 Claudiu Zissulescu <claz...@synopsys.com>
* config/arc/arc.md (mulsidi3): Change operand 0 predicate to
register_operand.
(umulsidi3): Likewise.
(indirect_jump): Fix jump instruction assembly patterns.
(arcset<code>): Change operand 1 predicate to nonmemory_operand.
(arcsetltu, arcsetgeu): Likewise.
(arcsethi, arcsetls): Fix pattern.
---
gcc/config/arc/arc.md | 146 ++++++++++++++++++++++++++++----------------------
1 file changed, 83 insertions(+), 63 deletions(-)
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index 6731072..9d87b76 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -1964,7 +1964,7 @@
(set_attr "cond" "nocond,canuse,nocond,canuse_limm,canuse,nocond")])
(define_expand "mulsidi3"
- [(set (match_operand:DI 0 "nonimmediate_operand" "")
+ [(set (match_operand:DI 0 "register_operand" "")
(mult:DI (sign_extend:DI(match_operand:SI 1 "register_operand" ""))
(sign_extend:DI(match_operand:SI 2 "nonmemory_operand" ""))))]
"TARGET_ANY_MPY"
@@ -2200,9 +2200,9 @@
}")
(define_expand "umulsidi3"
- [(set (match_operand:DI 0 "nonimmediate_operand" "")
- (mult:DI (zero_extend:DI(match_operand:SI 1 "register_operand" ""))
- (zero_extend:DI(match_operand:SI 2 "nonmemory_operand" ""))))]
+ [(set (match_operand:DI 0 "register_operand" "")
+ (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" ""))
+ (zero_extend:DI (match_operand:SI 2 "nonmemory_operand" ""))))]
""
{
if (TARGET_MPY)
@@ -3673,7 +3673,12 @@
(define_insn "indirect_jump"
[(set (pc) (match_operand:SI 0 "nonmemory_operand" "L,I,Cal,Rcqq,r"))]
""
- "j%!%* [%0]%&"
+ "@
+ j%!%* %0%&
+ j%!%* %0%&
+ j%!%* %0%&
+ j%!%* [%0]%&
+ j%!%* [%0]%&"
[(set_attr "type" "jump")
(set_attr "iscompact" "false,false,false,maybe,false")
(set_attr "cond" "canuse,canuse_limm,canuse,canuse,canuse")])
@@ -5425,90 +5430,105 @@
(define_code_iterator arcCC_cond [eq ne gt lt ge le])
(define_insn "arcset<code>"
- [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r")
- (arcCC_cond:SI (match_operand:SI 1 "register_operand" "0,r,0,r,0,0,r")
- (match_operand:SI 2 "nonmemory_operand"
"r,r,L,L,I,n,n")))]
- "TARGET_V2 && TARGET_CODE_DENSITY"
+ [(set (match_operand:SI 0 "register_operand"
"=r,r,r,r,r,r,r,r")
+ (arcCC_cond:SI (match_operand:SI 1 "nonmemory_operand"
"0,r,n,0,r,0,0,r")
+ (match_operand:SI 2 "nonmemory_operand"
"r,r,r,L,L,I,n,n")))]
+ "TARGET_V2 && TARGET_CODE_DENSITY
+ && (register_operand (operands[1], SImode)
+ || register_operand (operands[2], SImode))"
"set<code>%? %0, %1, %2"
- [(set_attr "length" "4,4,4,4,4,8,8")
+ [(set_attr "length" "4,4,8,4,4,4,8,8")
(set_attr "iscompact" "false")
(set_attr "type" "compare")
- (set_attr "predicable" "yes,no,yes,no,no,yes,no")
- (set_attr "cond" "canuse,nocond,canuse,nocond,nocond,canuse,nocond")
+ (set_attr "predicable" "yes,no,no,yes,no,no,yes,no")
+ (set_attr "cond" "canuse,nocond,nocond,canuse,nocond,nocond,canuse,nocond")
])
(define_insn "arcsetltu"
- [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r, r, r")
- (ltu:SI (match_operand:SI 1 "register_operand" "0,r,0,r,0, 0, r")
- (match_operand:SI 2 "nonmemory_operand" "r,r,L,L,I, n, n")))]
- "TARGET_V2 && TARGET_CODE_DENSITY"
+ [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r, r, r")
+ (ltu:SI (match_operand:SI 1 "nonmemory_operand" "0,r,n,0,r,0, 0, r")
+ (match_operand:SI 2 "nonmemory_operand" "r,r,r,L,L,I, n,
n")))]
+ "TARGET_V2 && TARGET_CODE_DENSITY
+ && (register_operand (operands[1], SImode)
+ || register_operand (operands[2], SImode))"
"setlo%? %0, %1, %2"
- [(set_attr "length" "4,4,4,4,4,8,8")
+ [(set_attr "length" "4,4,8,4,4,4,8,8")
(set_attr "iscompact" "false")
(set_attr "type" "compare")
- (set_attr "predicable" "yes,no,yes,no,no,yes,no")
- (set_attr "cond" "canuse,nocond,canuse,nocond,nocond,canuse,nocond")
+ (set_attr "predicable" "yes,no,no,yes,no,no,yes,no")
+ (set_attr "cond" "canuse,nocond,nocond,canuse,nocond,nocond,canuse,nocond")
])
(define_insn "arcsetgeu"
- [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r, r, r")
- (geu:SI (match_operand:SI 1 "register_operand" "0,r,0,r,0, 0, r")
- (match_operand:SI 2 "nonmemory_operand" "r,r,L,L,I, n, n")))]
- "TARGET_V2 && TARGET_CODE_DENSITY"
+ [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r, r, r")
+ (geu:SI (match_operand:SI 1 "nonmemory_operand" "0,r,n,0,r,0, 0, r")
+ (match_operand:SI 2 "nonmemory_operand" "r,r,r,L,L,I, n,
n")))]
+ "TARGET_V2 && TARGET_CODE_DENSITY
+ && (register_operand (operands[1], SImode)
+ || register_operand (operands[2], SImode))"
"seths%? %0, %1, %2"
- [(set_attr "length" "4,4,4,4,4,8,8")
+ [(set_attr "length" "4,4,8,4,4,4,8,8")
(set_attr "iscompact" "false")
(set_attr "type" "compare")
- (set_attr "predicable" "yes,no,yes,no,no,yes,no")
- (set_attr "cond" "canuse,nocond,canuse,nocond,nocond,canuse,nocond")
+ (set_attr "predicable" "yes,no,no,yes,no,no,yes,no")
+ (set_attr "cond" "canuse,nocond,nocond,canuse,nocond,nocond,canuse,nocond")
])
;; Special cases of SETCC
(define_insn_and_split "arcsethi"
- [(set (match_operand:SI 0 "register_operand" "=r,r, r,r")
- (gtu:SI (match_operand:SI 1 "register_operand" "r,r, r,r")
- (match_operand:SI 2 "nonmemory_operand" "0,r,C62,n")))]
- "TARGET_V2 && TARGET_CODE_DENSITY"
- "setlo%? %0, %2, %1"
- "reload_completed
- && CONST_INT_P (operands[2])
- && satisfies_constraint_C62 (operands[2])"
+ [(set (match_operand:SI 0 "register_operand" "=r, r,r,r")
+ (gtu:SI (match_operand:SI 1 "nonmemory_operand" "r, r,r,n")
+ (match_operand:SI 2 "nonmemory_operand" "r,C62,n,r")))]
+ "TARGET_V2 && TARGET_CODE_DENSITY
+ && (register_operand (operands[1], SImode)
+ || register_operand (operands[2], SImode))"
+
+ "#"
+ "reload_completed"
[(const_int 0)]
"{
- /* sethi a,b,u6 => seths a,b,u6 + 1. */
- operands[2] = GEN_INT (INTVAL (operands[2]) + 1);
- emit_insn (gen_arcsetgeu (operands[0], operands[1], operands[2]));
- DONE;
+ if (CONST_INT_P (operands[2]) && satisfies_constraint_C62 (operands[2]))
+ {
+ /* sethi a,b,u6 => seths a,b,u6 + 1. */
+ operands[2] = GEN_INT (INTVAL (operands[2]) + 1);
+ emit_insn (gen_arcsetgeu (operands[0], operands[1], operands[2]));
+ DONE;
+ }
+ else
+ {
+ emit_insn (gen_arcsetltu (operands[0], operands[2], operands[1]));
+ DONE;
+ }
}"
- [(set_attr "length" "4,4,4,8")
- (set_attr "iscompact" "false")
- (set_attr "type" "compare")
- (set_attr "predicable" "yes,no,no,no")
- (set_attr "cond" "canuse,nocond,nocond,nocond")]
-)
+ [(set_attr "length" "4,4,8,8")
+ (set_attr "type" "compare")])
(define_insn_and_split "arcsetls"
- [(set (match_operand:SI 0 "register_operand" "=r,r, r,r")
- (leu:SI (match_operand:SI 1 "register_operand" "r,r, r,r")
- (match_operand:SI 2 "nonmemory_operand" "0,r,C62,n")))]
- "TARGET_V2 && TARGET_CODE_DENSITY"
- "seths%? %0, %2, %1"
- "reload_completed
- && CONST_INT_P (operands[2])
- && satisfies_constraint_C62 (operands[2])"
+ [(set (match_operand:SI 0 "register_operand" "=r, r,r,r")
+ (leu:SI (match_operand:SI 1 "nonmemory_operand" "r, r,r,n")
+ (match_operand:SI 2 "nonmemory_operand" "r,C62,n,r")))]
+ "TARGET_V2 && TARGET_CODE_DENSITY
+ && (register_operand (operands[1], SImode)
+ || register_operand (operands[2], SImode))"
+ "#"
+ "reload_completed"
[(const_int 0)]
"{
- /* setls a,b,u6 => setlo a,b,u6 + 1. */
- operands[2] = GEN_INT (INTVAL (operands[2]) + 1);
- emit_insn (gen_arcsetltu (operands[0], operands[1], operands[2]));
- DONE;
- }"
- [(set_attr "length" "4,4,4,8")
- (set_attr "iscompact" "false")
- (set_attr "type" "compare")
- (set_attr "predicable" "yes,no,no,no")
- (set_attr "cond" "canuse,nocond,nocond,nocond")]
-)
+ if (CONST_INT_P (operands[2]) && satisfies_constraint_C62 (operands[2]))
+ {
+ /* setls a,b,u6 => setlo a,b,u6 + 1. */
+ operands[2] = GEN_INT (INTVAL (operands[2]) + 1);
+ emit_insn (gen_arcsetltu (operands[0], operands[1], operands[2]));
+ DONE;
+ }
+ else
+ {
+ emit_insn (gen_arcsetgeu (operands[0], operands[2], operands[1]));
+ DONE;
+ }
+ }"
+ [(set_attr "length" "4,4,8,8")
+ (set_attr "type" "compare")])
; Any mode that needs to be solved by secondary reload
(define_mode_iterator SRI [QI HI])
--
2.5.1
