The combine pass may conclude umulhisi3_imm pattern can accept also sign extended 16-bit constants. This patch prohibits the combine in considering this pattern as suitable.
OK to apply? Claudiu gcc/ 2016-04-18 Claudiu Zissulescu <claz...@synopsys.com> * config/arc/arc.md (umulhisi3_imm): Avoid unwanted match for sign extend 16-bit constants. * testsuite/gcc.target/arc/umulsihi3_z.c: New file. --- gcc/config/arc/arc.md | 3 ++- gcc/testsuite/gcc.target/arc/umulsihi3_z.c | 23 +++++++++++++++++++++++ 2 files changed, 25 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/arc/umulsihi3_z.c diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index 74530b1..6731072 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -1729,7 +1729,8 @@ (define_insn "umulhisi3_imm" [(set (match_operand:SI 0 "register_operand" "=r, r,r, r, r") (mult:SI (zero_extend:SI (match_operand:HI 1 "register_operand" " 0, r,0, 0, r")) - (match_operand:HI 2 "short_const_int_operand" " L, L,I,C16,C16")))] + (match_operand:HI 2 "short_const_int_operand" " L, L,I,C16,C16"))) + (use (match_dup 2))] "TARGET_MPYW" "mpyuw%? %0,%1,%2" [(set_attr "length" "4,4,4,8,8") diff --git a/gcc/testsuite/gcc.target/arc/umulsihi3_z.c b/gcc/testsuite/gcc.target/arc/umulsihi3_z.c new file mode 100644 index 0000000..cf1c00d --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/umulsihi3_z.c @@ -0,0 +1,23 @@ +/* Check if the optimizers are not removing the umulsihi3_imm + instruction. */ +/* { dg-do run } */ +/* { dg-options "-O2 -fno-inline" } */ + +#include <stdint.h> + +static int32_t test (int16_t reg_val) +{ + int32_t x = (reg_val & 0xf) * 62500; + return x; +} + +int main (void) +{ + volatile int32_t x = 0xc172; + x = test (x); + + if (x != 0x0001e848) + __builtin_abort (); + return 0; +} + -- 1.9.1