On Sat, Mar 12, 2016 at 09:59:12AM -0500, David Edelsohn wrote:
> > 2016-03-12 Segher Boessenkool <seg...@kernel.crashing.org>
> >
> > PR target/70098
> > * config/rs6000/rs6000.md (*ctr<mode>_internal1,
> > *ctr<mode>_internal2,
> > *ctr<mode>_internal5, *ctr<mode>_internal6): Also allow "d" as
> > output.
> > (define_split for the GPR case): Use int_reg_operand instead of
> > gpc_reg_operand for the output.
> >
> > gcc/testsuite/
> > PR target/70098
> > * g++.dg/pr70098.C: New testcase.
>
> This is okay.
>
> The testcase will need some XFAILs.
That wasn't so easy. I came up with the following; okay as well?
(I'll fold it before committing).
Segher
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_powerpc64_no_dm):
New function.
diff --git a/gcc/testsuite/g++.dg/pr70098.C b/gcc/testsuite/g++.dg/pr70098.C
index c7b4f63..f5eb48f 100644
--- a/gcc/testsuite/g++.dg/pr70098.C
+++ b/gcc/testsuite/g++.dg/pr70098.C
@@ -2,6 +2,8 @@
// { dg-do compile }
// { dg-options -O2 }
// { dg-require-effective-target c++11 }
+// { dg-xfail-if "PR70098" { lp64 && powerpc64_no_dm } }
+// { dg-prune-output ".*internal compiler error.*" }
template < typename > struct traits;
template < typename, int _Rows, int _Cols, int = 0, int = _Rows,
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index 5af139b..49b82c3 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1629,6 +1629,19 @@ proc check_effective_target_avx_runtime { } {
return 0
}
+# Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
+# move instructions for moves from GPR to FPR.
+
+proc check_effective_target_powerpc64_no_dm { } {
+ # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
+ # checks if we do not use direct moves, but use the old-fashioned
+ # slower move-via-the-stack.
+ return [check_no_messages_and_pattern powerpc64_no_dm \
+ {\mmulld\M.*\mlfd} assembly {
+ double f(long long x) { return x*x; }
+ } {-O2}]
+}
+
# Return 1 if the target supports executing power8 vector instructions, 0
# otherwise. Cache the result.
