This patch makes TFmode be fully switchable for comparisons.
I have built the compiler with this patch and the previous subpatches (1-13).
I have bootstrapped the compiler with all 16 subpatches installed, and there
were no regressions. Is it ok to install in the trunk?
2015-10-22 Michael Meissner <meiss...@linux.vnet.ibm.com>
* config/rs6000/rs6000.md (cmptf_internal1): Use a mode iterator
to add support for both types (IFmode, TFmode) that support IBM
extended double.
(cmp<mode>_internal1): Likewise.
(cmptf_internal2): Likewise.
(cmp<mode>_internal2): Likewise.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md (revision 229200)
+++ gcc/config/rs6000/rs6000.md (working copy)
@@ -10576,20 +10576,20 @@ (define_split
(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 4)))])
;; Only need to compare second words if first words equal
-(define_insn "*cmptf_internal1"
+(define_insn "*cmp<mode>_internal1"
[(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
- (compare:CCFP (match_operand:TF 1 "gpc_reg_operand" "d")
- (match_operand:TF 2 "gpc_reg_operand" "d")))]
- "!TARGET_IEEEQUAD && !TARGET_XL_COMPAT
+ (compare:CCFP (match_operand:IBM128 1 "gpc_reg_operand" "d")
+ (match_operand:IBM128 2 "gpc_reg_operand" "d")))]
+ "!TARGET_XL_COMPAT && FLOAT128_IBM_P (<MODE>mode)
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT &&
TARGET_LONG_DOUBLE_128"
"fcmpu %0,%1,%2\;bne %0,$+8\;fcmpu %0,%L1,%L2"
[(set_attr "type" "fpcompare")
(set_attr "length" "12")])
-(define_insn_and_split "*cmptf_internal2"
+(define_insn_and_split "*cmp<mode>_internal2"
[(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
- (compare:CCFP (match_operand:TF 1 "gpc_reg_operand" "d")
- (match_operand:TF 2 "gpc_reg_operand" "d")))
+ (compare:CCFP (match_operand:IBM128 1 "gpc_reg_operand" "d")
+ (match_operand:IBM128 2 "gpc_reg_operand" "d")))
(clobber (match_scratch:DF 3 "=d"))
(clobber (match_scratch:DF 4 "=d"))
(clobber (match_scratch:DF 5 "=d"))
@@ -10599,7 +10599,7 @@ (define_insn_and_split "*cmptf_internal2
(clobber (match_scratch:DF 9 "=d"))
(clobber (match_scratch:DF 10 "=d"))
(clobber (match_scratch:GPR 11 "=b"))]
- "!TARGET_IEEEQUAD && TARGET_XL_COMPAT
+ "TARGET_XL_COMPAT && FLOAT128_IBM_P (<MODE>mode)
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT &&
TARGET_LONG_DOUBLE_128"
"#"
"&& reload_completed"
@@ -10623,10 +10623,10 @@ (define_insn_and_split "*cmptf_internal2
const int lo_word = LONG_DOUBLE_LARGE_FIRST ? GET_MODE_SIZE (DFmode) : 0;
const int hi_word = LONG_DOUBLE_LARGE_FIRST ? 0 : GET_MODE_SIZE (DFmode);
- operands[5] = simplify_gen_subreg (DFmode, operands[1], TFmode, hi_word);
- operands[6] = simplify_gen_subreg (DFmode, operands[1], TFmode, lo_word);
- operands[7] = simplify_gen_subreg (DFmode, operands[2], TFmode, hi_word);
- operands[8] = simplify_gen_subreg (DFmode, operands[2], TFmode, lo_word);
+ operands[5] = simplify_gen_subreg (DFmode, operands[1], <MODE>mode, hi_word);
+ operands[6] = simplify_gen_subreg (DFmode, operands[1], <MODE>mode, lo_word);
+ operands[7] = simplify_gen_subreg (DFmode, operands[2], <MODE>mode, hi_word);
+ operands[8] = simplify_gen_subreg (DFmode, operands[2], <MODE>mode, lo_word);
operands[12] = gen_label_rtx ();
operands[13] = gen_label_rtx ();
real_inf (&rv);
