PR67808 exposes a problem with the constraints in the *extenddftf2_internal pattern, in that it allows TFmode operands to occupy Altivec registers which they are not allowed to do. Reload was able to work around the problem, but LRA is more pedantic and it caused it to go into an infinite spill loop until it ICEd. The following patch from Mike changes the TFmode output operand to use the "d" constraint instead of "ws". It also allows using the "ws" constraint for the two input operands, since that is allowed for DFmode operands.
This passed bootstraps (with reload on by default and lra on by default) and shows no testsuite regressions. Is this ok for trunk? The bug is also present in the FSF 5 branch (4.9 is ok), is this ok for that too, assuming my bootstrap/regtesting there are clean? Peter gcc/ PR target/67808 * config/rs6000/rs6000.md (*extenddftf2_internal): Fix constraints. gcc/testsuite/ * gcc.target/powerpc/pr67808.c: New test. Index: gcc/config/rs6000/rs6000.md =================================================================== --- gcc/config/rs6000/rs6000.md (revision 228387) +++ gcc/config/rs6000/rs6000.md (working copy) @@ -6511,9 +6511,9 @@ }) (define_insn_and_split "*extenddftf2_internal" - [(set (match_operand:TF 0 "nonimmediate_operand" "=m,Y,ws,d,&d") - (float_extend:TF (match_operand:DF 1 "input_operand" "d,r,md,md,md"))) - (use (match_operand:DF 2 "zero_reg_mem_operand" "d,r,j,m,d"))] + [(set (match_operand:TF 0 "nonimmediate_operand" "=m,Y,d,d,&d") + (float_extend:TF (match_operand:DF 1 "input_operand" "ws,r,md,md,md"))) + (use (match_operand:DF 2 "zero_reg_mem_operand" "ws,r,j,m,ws"))] "!TARGET_IEEEQUAD && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT && TARGET_LONG_DOUBLE_128" Index: gcc/testsuite/gcc.target/powerpc/pr67808.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/pr67808.c (revision 0) +++ gcc/testsuite/gcc.target/powerpc/pr67808.c (working copy) @@ -0,0 +1,12 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-O1 -mvsx -mlra" } */ + +/* PR 67808: LRA ICEs on simple double to long double conversion test case */ + +void +foo (long double *ldb1, double *db1) +{ + *ldb1 = *db1; +}