Hello,
This patch introduces switches necessary for new Intel Server CPU
(code-named Skylake).
Bootstrapped & regtested.
Is it ok for trunk?
gcc/
* config.gcc: Support "skx".
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
PROCESSOR_SKX.
* config/i386/i386.c (m_SKX): Define.
(processor_target_table): Add "skx".
(PTA_SKX): Define.
(ix86_option_override_internal): Add "skx".
(fold_builtin_cpu): Handle "skx".
* config/i386/i386.h (TARGET_SKX): Define.
(processor_type): Add PROCESSOR_SKX.
* config/i386/i386.md (attr "cpu"): Add knl.
* config/i386/x86-tune.def: Add m_KNL.
gcc/testsuite/
* gcc.target/i386/funcspec-5.c: Test avx512vl, avx512bw,
avx512dq, avx512cd, avx512er, avx512pf and skx.
--
Thanks, K
commit ffaaf5ad0460cd5bd85f6fd4b360fb1171eb273e
Author: Kirill Yukhin <kirill.yuk...@intel.com>
Date: Fri Sep 18 14:03:54 2015 +0300
AVX-512. Introduce SKX CPU.
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 75807f5..18da001 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -595,7 +595,7 @@ x86_64_archs="amdfam10 athlon64 athlon64-sse3 barcelona
bdver1 bdver2 \
bdver3 bdver4 btver1 btver2 k8 k8-sse3 opteron opteron-sse3 nocona \
core2 corei7 corei7-avx core-avx-i core-avx2 atom slm nehalem westmere \
sandybridge ivybridge haswell broadwell bonnell silvermont knl x86-64 \
-native"
+native skx"
# Additional x86 processors supported by --with-cpu=. Each processor
# MUST be separated by exactly one space.
diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c
index 35cecd0..09670bb 100644
--- a/gcc/config/i386/i386-c.c
+++ b/gcc/config/i386/i386-c.c
@@ -177,6 +177,10 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
def_or_undef (parse_in, "__knl");
def_or_undef (parse_in, "__knl__");
break;
+ case PROCESSOR_SKX:
+ def_or_undef (parse_in, "__skx");
+ def_or_undef (parse_in, "__skx__");
+ break;
/* use PROCESSOR_max to not set/unset the arch macro. */
case PROCESSOR_max:
break;
@@ -286,6 +290,9 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
case PROCESSOR_KNL:
def_or_undef (parse_in, "__tune_knl__");
break;
+ case PROCESSOR_SKX:
+ def_or_undef (parse_in, "__tune_skx__");
+ break;
case PROCESSOR_IAMCU:
def_or_undef (parse_in, "__tune_iamcu__");
break;
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 00e7006..d34bb62 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2098,6 +2098,7 @@ const struct processor_costs *ix86_cost = &pentium_cost;
#define m_BONNELL (1<<PROCESSOR_BONNELL)
#define m_SILVERMONT (1<<PROCESSOR_SILVERMONT)
#define m_KNL (1<<PROCESSOR_KNL)
+#define m_SKX (1<<PROCESSOT_SKX)
#define m_INTEL (1<<PROCESSOR_INTEL)
#define m_GEODE (1<<PROCESSOR_GEODE)
@@ -2567,6 +2568,7 @@ static const struct ptt
processor_target_table[PROCESSOR_max] =
{"bonnell", &atom_cost, 16, 15, 16, 7, 16},
{"silvermont", &slm_cost, 16, 15, 16, 7, 16},
{"knl", &slm_cost, 16, 15, 16, 7, 16},
+ {"skx", &core_cost, 16, 10, 16, 10, 16},
{"intel", &intel_cost, 16, 15, 16, 7, 16},
{"geode", &geode_cost, 0, 0, 0, 0, 0},
{"k6", &k6_cost, 32, 7, 32, 7, 32},
@@ -3286,6 +3288,9 @@ ix86_option_override_internal (bool main_args_p,
(PTA_HASWELL | PTA_ADX | PTA_PRFCHW | PTA_RDSEED)
#define PTA_SKYLAKE \
(PTA_BROADWELL | PTA_CLFLUSHOPT | PTA_XSAVEC | PTA_XSAVES)
+#define PTA_SKX \
+ (PTA_SKYLAKE | PTA_AVX512F | PTA_AVX512CD | PTA_AVX512VL \
+ | PTA_AVX512BW | PTA_AVX512DQ)
#define PTA_KNL \
(PTA_BROADWELL | PTA_AVX512PF | PTA_AVX512ER | PTA_AVX512F | PTA_AVX512CD)
#define PTA_BONNELL \
@@ -3349,6 +3354,7 @@ ix86_option_override_internal (bool main_args_p,
{"core-avx2", PROCESSOR_HASWELL, CPU_HASWELL, PTA_HASWELL},
{"broadwell", PROCESSOR_HASWELL, CPU_HASWELL, PTA_BROADWELL},
{"skylake", PROCESSOR_HASWELL, CPU_HASWELL, PTA_SKYLAKE},
+ {"skx", PROCESSOR_HASWELL, CPU_HASWELL, PTA_SKX},
{"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL},
{"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL},
{"silvermont", PROCESSOR_SILVERMONT, CPU_SLM, PTA_SILVERMONT},
@@ -35658,7 +35664,8 @@ fold_builtin_cpu (tree fndecl, tree *args)
M_INTEL_COREI7_IVYBRIDGE,
M_INTEL_COREI7_HASWELL,
M_INTEL_COREI7_BROADWELL,
- M_INTEL_COREI7_SKYLAKE
+ M_INTEL_COREI7_SKYLAKE,
+ M_INTEL_COREI7_SKX
};
static struct _arch_names_table
@@ -35681,6 +35688,7 @@ fold_builtin_cpu (tree fndecl, tree *args)
{"haswell", M_INTEL_COREI7_HASWELL},
{"broadwell", M_INTEL_COREI7_BROADWELL},
{"skylake", M_INTEL_COREI7_SKYLAKE},
+ {"skx", M_INTEL_COREI7_SKX},
{"bonnell", M_INTEL_BONNELL},
{"silvermont", M_INTEL_SILVERMONT},
{"knl", M_INTEL_KNL},
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 7bd23ec..91cc682 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -340,6 +340,7 @@ extern const struct processor_costs ix86_size_cost;
#define TARGET_BONNELL (ix86_tune == PROCESSOR_BONNELL)
#define TARGET_SILVERMONT (ix86_tune == PROCESSOR_SILVERMONT)
#define TARGET_KNL (ix86_tune == PROCESSOR_KNL)
+#define TARGET_SKX (ix86_tune == PROCESSOR_SKX)
#define TARGET_INTEL (ix86_tune == PROCESSOR_INTEL)
#define TARGET_GENERIC (ix86_tune == PROCESSOR_GENERIC)
#define TARGET_AMDFAM10 (ix86_tune == PROCESSOR_AMDFAM10)
@@ -2290,6 +2291,7 @@ enum processor_type
PROCESSOR_BONNELL,
PROCESSOR_SILVERMONT,
PROCESSOR_KNL,
+ PROCESSOR_SKX,
PROCESSOR_INTEL,
PROCESSOR_GEODE,
PROCESSOR_K6,
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 547ee2d..5d5b851 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -22382,6 +22382,12 @@ SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL,
FSGSBASE, RDRND, FMA,
BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, AVX512F, AVX512PF, AVX512ER and
AVX512CD instruction set support.
+@item skx
+Intel Skylake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
+SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA,
+BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, XSAVES, AVX512F,
+AVX512VL, AVX512BW, AVX512DQ and AVX512CD instruction set support.
+
@item k6
AMD K6 CPU with MMX instruction set support.
diff --git a/gcc/testsuite/gcc.target/i386/funcspec-5.c
b/gcc/testsuite/gcc.target/i386/funcspec-5.c
index 7185b5c..3b7cf19 100644
--- a/gcc/testsuite/gcc.target/i386/funcspec-5.c
+++ b/gcc/testsuite/gcc.target/i386/funcspec-5.c
@@ -25,6 +25,12 @@ extern void test_tbm (void)
__attribute__((__target__("tbm")));
extern void test_avx (void)
__attribute__((__target__("avx")));
extern void test_avx2 (void)
__attribute__((__target__("avx2")));
extern void test_avx512f (void)
__attribute__((__target__("avx512f")));
+extern void test_avx512vl(void)
__attribute__((__target__("avx512vl")));
+extern void test_avx512bw(void)
__attribute__((__target__("avx512bw")));
+extern void test_avx512dq(void)
__attribute__((__target__("avx512dq")));
+extern void test_avx512er(void)
__attribute__((__target__("avx512er")));
+extern void test_avx512pf(void)
__attribute__((__target__("avx512pf")));
+extern void test_avx512cd(void)
__attribute__((__target__("avx512cd")));
extern void test_bmi (void)
__attribute__((__target__("bmi")));
extern void test_bmi2 (void)
__attribute__((__target__("bmi2")));
@@ -50,6 +56,12 @@ extern void test_no_tbm (void)
__attribute__((__target__("no-tbm")));
extern void test_no_avx (void)
__attribute__((__target__("no-avx")));
extern void test_no_avx2 (void)
__attribute__((__target__("no-avx2")));
extern void test_no_avx512f (void)
__attribute__((__target__("no-avx512f")));
+extern void test_no_avx512vl(void)
__attribute__((__target__("no-avx512vl")));
+extern void test_no_avx512bw(void)
__attribute__((__target__("no-avx512bw")));
+extern void test_no_avx512dq(void)
__attribute__((__target__("no-avx512dq")));
+extern void test_no_avx512er(void)
__attribute__((__target__("no-avx512er")));
+extern void test_bo_avx512pf(void)
__attribute__((__target__("no-avx512pf")));
+extern void test_no_avx512cd(void)
__attribute__((__target__("no-avx512cd")));
extern void test_no_bmi (void)
__attribute__((__target__("no-bmi")));
extern void test_no_bmi2 (void)
__attribute__((__target__("no-bmi2")));
@@ -77,6 +89,7 @@ extern void test_arch_corei7 (void)
__attribute__((__target__("arch=corei7")));
extern void test_arch_corei7_avx (void)
__attribute__((__target__("arch=corei7-avx")));
extern void test_arch_core_avx2 (void)
__attribute__((__target__("arch=core-avx2")));
extern void test_arch_knl (void)
__attribute__((__target__("arch=knl")));
+extern void test_arch_skx (void)
__attribute__((__target__("arch=skx")));
extern void test_arch_geode (void)
__attribute__((__target__("arch=geode")));
extern void test_arch_k6 (void)
__attribute__((__target__("arch=k6")));
extern void test_arch_k6_2 (void)
__attribute__((__target__("arch=k6-2")));
