[PATCH 2/2] Set REG_EQUAL

[Kugan]

This patch sets REG_EQUAL when emitting arm_emit_movpair.

Thanks,
Kugan

gcc/testsuite/ChangeLog:

2015-06-26  Kugan Vivekanandarajah  <kug...@linaro.org>

        * gcc.target/arm/reg_equal_test.c: New test.

gcc.

2015-06-26  Kugan Vivekanandarajah  <kug...@linaro.org>

        * config/arm/arm.c (arm_emit_movpair): Add REG_EQUAL notes to
        instruction.

>From e90feaca4d7dfc893cb2a0142e1888655c9ffa1f Mon Sep 17 00:00:00 2001
From: Kugan Vivekanandarajah <kugan.vivekanandara...@linaro.org>
Date: Fri, 26 Jun 2015 17:22:22 +1000
Subject: [PATCH 2/2] Add REG_EQUAL note for arm_emit_movpair

---
 gcc/config/arm/arm.c                          | 14 +++++++++++---
 gcc/testsuite/ChangeLog                       |  4 ++++
 gcc/testsuite/gcc.target/arm/reg_equal_test.c | 24 ++++++++++++++++++++++++
 3 files changed, 39 insertions(+), 3 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/arm/reg_equal_test.c

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 83f3269..8a47c72 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -17884,19 +17884,27 @@ output_mov_long_double_arm_from_arm (rtx *operands)
 void
 arm_emit_movpair (rtx dest, rtx src)
  {
+  rtx insn;
+
   /* If the src is an immediate, simplify it.  */
   if (CONST_INT_P (src))
     {
       HOST_WIDE_INT val = INTVAL (src);
       emit_set_insn (dest, GEN_INT (val & 0x0000ffff));
       if ((val >> 16) & 0x0000ffff)
-        emit_set_insn (gen_rtx_ZERO_EXTRACT (SImode, dest, GEN_INT (16),
-                                             GEN_INT (16)),
-                       GEN_INT ((val >> 16) & 0x0000ffff));
+	{
+	  emit_set_insn (gen_rtx_ZERO_EXTRACT (SImode, dest, GEN_INT (16),
+					       GEN_INT (16)),
+			 GEN_INT ((val >> 16) & 0x0000ffff));
+	  insn = get_last_insn ();
+	  set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
+	}
       return;
     }
    emit_set_insn (dest, gen_rtx_HIGH (SImode, src));
    emit_set_insn (dest, gen_rtx_LO_SUM (SImode, dest, src));
+   insn = get_last_insn ();
+   set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
  }
 
 /* Output a move between double words.  It must be REG<-MEM
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b6486ac..8edb484 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2015-06-26  Kugan Vivekanandarajah  <kug...@linaro.org>
+
+	* gcc.target/arm/reg_equal_test.c: New test.
+
 2015-06-25  Richard Biener  <rguent...@suse.de>
 
 	* gcc.dg/tree-ssa/pr52631.c: Disable forwprop.
diff --git a/gcc/testsuite/gcc.target/arm/reg_equal_test.c b/gcc/testsuite/gcc.target/arm/reg_equal_test.c
new file mode 100644
index 0000000..58fa9dd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/reg_equal_test.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O1 -fdump-rtl-expand" } */
+
+extern void abort (void);
+unsigned int a = 1;
+
+int
+main (void)
+{
+  unsigned int b, c, d;
+
+  if (sizeof (int) != 4 || (int) 0xc7d24b5e > 0)
+    return 0;
+
+  c = 0xc7d24b5e;
+  d = a | -2;
+  b = (d == 0) ? c : (c % d);
+  if (b != c)
+    abort ();
+
+  return 0;
+}
+
+/* { dg-final { scan-rtl-dump "expr_list:REG_EQUAL \\(const_int -942519458" "expand" } } */
-- 
1.9.1