Re: [PATCH 1/2] Allow REG_EQUAL for ZERO_EXTRACT

[Kugan]

I have made a mistake while addressing the review comments for this
patch. Unfortunately, It was not detected in my earlier testing. My
sincere graphology for the mistake.

I have basically missed the STRICT_LOW_PART check for the first if-check
thus the second part (which is the ZERO_EXTRACT part) will never get
executed. Attached patch fixes this along with some minor changes.

Bootstrapped and regression tested on arm-none-linux (Chromebook) and
x86-64-linux-gnu with no new regression along with the ARM ennoblement
patch.

Also did a complete arm qemu regression testing with Chriophe's scripts
with no new regression.
(http://people.linaro.org/~christophe.lyon/cross-validation/gcc-test-patches/225987-reg4/report-build-info.html)

Is this OK for trunk,


Thanks,
Kugan

gcc/ChangeLog:

2015-07-20  Kugan Vivekanandarajah  <kug...@linaro.org>

        * cse.c (cse_insn): Fix missing check for STRICT_LOW_PART and minor
        clean up.

diff --git a/gcc/cse.c b/gcc/cse.c
index 1c14d83..96adf18 100644
--- a/gcc/cse.c
+++ b/gcc/cse.c
@@ -4529,10 +4529,10 @@ cse_insn (rtx_insn *insn)
      this case, and if it isn't set, then there will be no equivalence
      for the destination.  */
   if (n_sets == 1 && REG_NOTES (insn) != 0
-      && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0)
+      && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
+      && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))))
     {
-      if ((! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)))
-         || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART)
+      if (GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART)
        src_eqv = copy_rtx (XEXP (tem, 0));
 
       /* If DEST is of the form ZERO_EXTACT, as in:
@@ -4544,14 +4544,14 @@ cse_insn (rtx_insn *insn)
         point.  Note that this is different from SRC_EQV. We can however
         calculate SRC_EQV with the position and width of ZERO_EXTRACT.  */
       else if (GET_CODE (SET_DEST (sets[0].rtl)) == ZERO_EXTRACT
-              && CONST_INT_P (src_eqv)
+              && CONST_INT_P (XEXP (tem, 0))
               && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 1))
               && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 2)))
        {
          rtx dest_reg = XEXP (SET_DEST (sets[0].rtl), 0);
          rtx width = XEXP (SET_DEST (sets[0].rtl), 1);
          rtx pos = XEXP (SET_DEST (sets[0].rtl), 2);
-         HOST_WIDE_INT val = INTVAL (src_eqv);
+         HOST_WIDE_INT val = INTVAL (XEXP (tem, 0));
          HOST_WIDE_INT mask;
          unsigned int shift;
          if (BITS_BIG_ENDIAN)