On Wed, Jul 20, 2011 at 4:51 AM, H.J. Lu <hjl.to...@gmail.com> wrote:
>>>> I had it in my x32 tree. But I reverted: >>>> >>>> http://gcc.gnu.org/ml/gcc-patches/2011-02/msg00954.html >>>> >>>> since Pmode is used in non-PIC tablejump, we have to put 64bit value for >>>> labels with 0 upper 32bits in tablejump for x32. >>> >>> The mode is completely controled by CASE_VECTOR_MODE. >>> >> >> Here is the updated patch. OK for trunk? >> > > A small change. It always use 64bit register for indirect branch. - ix86_print_operand (file, x, 0); + /* Always use 64bit register for indirect branch. */ + ix86_print_operand (file, x, + REG_P (x) && TARGET_64BIT ? 'q' : 0); return; /* Always use 64bit register for indirect branch. */ if (REG_P (x) && TARGET_64BIT) print_reg (x, 'q', file); else ix86_print_operand (file, x, 0); (define_insn "*indirect_jump" - [(set (pc) (match_operand:P 0 "nonimmediate_operand" "rm"))] + [(set (pc) (match_operand:P 0 "x32_indirect_branch_operand" "rm"))] Just name it "indirect_branch_operand". (define_insn_and_split "*call_vzeroupper" - [(call (mem:QI (match_operand:P 0 "call_insn_operand" "<c>zm")) + [(call (mem:QI (match_operand:P 0 "x32_call_insn_operand" "<c>zm")) Don't introduce new predicate, change call_insn_operand instead to conditionally disable memory_operand on x32. You will need to change "<c>zm" register constraint to "<c>z" on x32, otherwise you will get ICEs. And i386.c also calls call_insn_operand in one place. Uros.
