https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126165

            Bug ID: 126165
           Summary: INSN_SCHEDULING should generate reg->reg move instead
                    of load
           Product: gcc
           Version: 17.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: hjl.tools at gmail dot com
  Target Milestone: ---

[hjl@gnu-tgl-3 pr125297]$ cat x.c 
#include <stdarg.h>

extern void continuation (int, ...);

void
entry (int i, ...)
{
  va_list argp;
  va_start (argp, i);
  int arg1 = va_arg (argp, int);
  int arg2 = va_arg (argp, int);
  int arg3 = va_arg (argp, int);
  int arg4 = va_arg (argp, int);
  int arg5 = va_arg (argp, int);
  continuation (i, arg1, arg2, arg3, arg4, arg5);
}
[hjl@gnu-tgl-3 pr125297]$ /usr/gcc-16.1.1-x32/bin/gcc -S -O2 x.c
[hjl@gnu-tgl-3 pr125297]$ cat x.s
        .file   "x.c"
        .text
        .p2align 4
        .globl  entry
        .type   entry, @function
entry:
.LFB0:
        .cfi_startproc
        subq    $88, %rsp
        .cfi_def_cfa_offset 96
        leaq    96(%rsp), %rax
        movq    %rsi, 40(%rsp)
        movl    40(%rsp), %esi
        movq    %rdx, 48(%rsp)
        movl    48(%rsp), %edx
        movq    %rcx, 56(%rsp)
        movl    56(%rsp), %ecx
        movq    %r8, 64(%rsp)
        movl    64(%rsp), %r8d
        movq    %r9, 72(%rsp)
        movl    72(%rsp), %r9d
        movq    %rax, 16(%rsp)
        leaq    32(%rsp), %rax
        movq    %rax, 24(%rsp)
        xorl    %eax, %eax
        movl    $8, 8(%rsp)
        call    continuation
        addq    $88, %rsp
        .cfi_def_cfa_offset 8
        ret
        .cfi_endproc
.LFE0:
        .size   entry, .-entry
        .ident  "GCC: (GNU) 16.1.1 20260516"
        .section        .note.GNU-stack,"",@progbits
[hjl@gnu-tgl-3 pr125297]$ 

INSN_SCHEDULING should generate

        movq    %rsi, 40(%rsp)
        movl    %esi, %esi

instead of

        movq    %rsi, 40(%rsp)
        movl    40(%rsp), %esi

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