https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116583
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
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Keywords| |testsuite-fail
--- Comment #5 from Richard Biener <rguenth at gcc dot gnu.org> ---
Note this also causes the common aarch64 SVE and riscv FAIL
FAIL: gcc.dg/vect/pr97428.c scan-tree-dump-times vect "vectorizing stmts using
SLP" 1
FAIL: gcc.dg/vect/pr97428.c -flto -ffat-lto-objects scan-tree-dump-times vect
"vectorizing stmts using SLP" 1
where we can now use non-SLP interleaving for the 16-lane store where in
GCC 14 the store-group splitting that SLP analysis performed made that
impossible for variable-length vectors. When we add --param vect-force-slp=1
we generate the same non-VLA SLP code as GCC 14 did (but now with a single
instance).
So the main issue with the SLP transition is that we fail to materialize
interleaving schemes when using SLP (and the particular way we represent
those explicitly with extract even/odd VEC_PERM nodes).
