https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114902
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Component|target |rtl-optimization
--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Looks like the issue is during combine.
After combine we have:
```
12: r113:SI=[`b']
13: r112:SI=~r113:SI
REG_DEAD r113:SI
REG_EQUAL ~[`b']
14: NOTE_INSN_DELETED
15: {r109:SI=sign_extract(r112:SI,0x1,0);clobber flags:CC;}
REG_UNUSED flags:CC
18: NOTE_INSN_DELETED
19: NOTE_INSN_DELETED
22: r117:SI=0x1
21: flags:CCZ=cmp(zero_extract(r112:SI,0x1,0),0)
REG_DEAD r112:SI
23: r106:SI={(flags:CCZ==0)?r109:SI:r117:SI}
REG_DEAD r117:SI
REG_DEAD r109:SI
REG_DEAD flags:CCZ
REG_EQUAL {(flags:CCZ==0)?r109:SI:0x1}
```
insn 21 is wrong.
```
Trying 15 -> 18:
15: {r109:SI=sign_extract(r112:SI,0x1,0);clobber flags:CC;}
REG_DEAD r112:SI
REG_UNUSED flags:CC
18: flags:CCGC=cmp(r109:SI,0xffffffffffffffff)
Failed to match this instruction:
(parallel [
(set (reg:CCZ 17 flags)
(compare:CCZ (zero_extract:SI (reg:SI 112 [ _2 ])
(const_int 1 [0x1])
(const_int 0 [0]))
(const_int 0 [0])))
(set (reg/v:SI 109 [ eD.2798 ])
(sign_extract:SI (reg:SI 112 [ _2 ])
(const_int 1 [0x1])
(const_int 0 [0])))
])
Failed to match this instruction:
(parallel [
(set (reg:CCZ 17 flags)
(compare:CCZ (zero_extract:SI (reg:SI 112 [ _2 ])
(const_int 1 [0x1])
(const_int 0 [0]))
(const_int 0 [0])))
(set (reg/v:SI 109 [ eD.2798 ])
(sign_extract:SI (reg:SI 112 [ _2 ])
(const_int 1 [0x1])
(const_int 0 [0])))
])
Failed to match this instruction:
(parallel [
(set (reg:CCZ 17 flags)
(compare:CCZ (and:SI (reg:SI 112 [ _2 ])
(const_int 1 [0x1]))
(const_int 0 [0])))
(set (reg/v:SI 109 [ eD.2798 ])
(sign_extract:SI (reg:SI 112 [ _2 ])
(const_int 1 [0x1])
(const_int 0 [0])))
])
Failed to match this instruction:
(parallel [
(set (reg:CCZ 17 flags)
(compare:CCZ (and:SI (reg:SI 112 [ _2 ])
(const_int 1 [0x1]))
(const_int 0 [0])))
(set (reg/v:SI 109 [ eD.2798 ])
(sign_extract:SI (reg:SI 112 [ _2 ])
(const_int 1 [0x1])
(const_int 0 [0])))
])
Successfully matched this instruction:
(set (reg/v:SI 109 [ eD.2798 ])
(sign_extract:SI (reg:SI 112 [ _2 ])
(const_int 1 [0x1])
(const_int 0 [0])))
Successfully matched this instruction:
(set (reg:CCZ 17 flags)
(compare:CCZ (zero_extract:SI (reg:SI 112 [ _2 ])
(const_int 1 [0x1])
(const_int 0 [0]))
(const_int 0 [0])))
Successfully matched this instruction:
(set (reg:QI 115 [ _10 ])
(ne:QI (reg:CCZ 17 flags)
(const_int 0 [0])))
allowing combination of insns 15 and 18
original costs 4 + 4 = 12
replacement costs 4 + 4 = 12
modifying other_insn 19: r115:QI=flags:CCZ!=0
REG_DEAD flags:CCGC
deferring rescan insn with uid = 19.
modifying insn i2 15: {r109:SI=sign_extract(r112:SI,0x1,0);clobber
flags:CC;}
REG_UNUSED flags:CC
deferring rescan insn with uid = 15.
modifying insn i3 18: flags:CCZ=cmp(zero_extract(r112:SI,0x1,0),0)
REG_DEAD r112:SI
deferring rescan insn with uid = 18.
```
We go from CCGC with a sign_extend to a zero_extend with CCZ. that can't be
right.
