[Bug middle-end/111548] RISC-V Vector: ICE in validate_change_or_fail (vsetvl pass)

[jeremy.bennett at embecosm dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111548

Jeremy Bennett <jeremy.bennett at embecosm dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|---                         |FIXED

--- Comment #2 from Jeremy Bennett <jeremy.bennett at embecosm dot com> ---
Confirmed that the test now passes, as indeed does SPEC CPU 2017 602.gcc_s.

Thanks for the fix. Marking as resolved.