[Bug target/99195] Optimise away vec_concat of 64-bit AdvancedSIMD operations with zeroes in aarch64

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99195

--- Comment #14 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Kyrylo Tkachov <ktkac...@gcc.gnu.org>:

https://gcc.gnu.org/g:676d33f95eede2dfa629c9b0174c15cc55c4a45a

commit r14-819-g676d33f95eede2dfa629c9b0174c15cc55c4a45a
Author: Kyrylo Tkachov <kyrylo.tkac...@arm.com>
Date:   Mon May 15 09:49:48 2023 +0100

    aarch64: PR target/99195 annotate qabs,qneg patterns for vec-concat-zero

    Straightforward like previous patches in this series.
    Bootstrapped and tested on aarch64-none-linux-gnu and aarch64_be-none-elf.

    gcc/ChangeLog:

            PR target/99195
            * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename
to...
            (aarch64_s<optab><mode><vczle><vczbe>): ... This.

    gcc/testsuite/ChangeLog:

            PR target/99195
            * gcc.target/aarch64/simd/pr99195_4.c: Add testing for qabs, qneg.