https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108938
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
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CC| |jakub at gcc dot gnu.org
--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
That then feels like a fairly standard sequence that the bswap should handle
generically if 32-bit bswap and rotate is supported.
Right now it has the CMPNOP (0x0807060504030201) and CMPXCHG
(0x0102030405060708)
patterns it groks, so this would add for 32-bit only 0x03040102 (or, does it
make sense
for 64-bit too, then we'd need to do 3 rotates?).
And then ARM/AArch64 could just combine this bswap + rotate into whatever it
needs.
