https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94119

Martin Liška <marxin at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |marxin at gcc dot gnu.org

--- Comment #7 from Martin Liška <marxin at gcc dot gnu.org> ---
commit r9-8372-g593e47a6134085e9b856c62f98f72acd4446ba7c
Author: Eric Botcazou <ebotca...@gcc.gnu.org>
Date:   Fri Mar 13 09:58:44 2020 +0100

    Fix incorrect filling of delay slots in branchy code at -O2

    The issue is that relax_delay_slots can streamline the CFG in some cases,
    in particular remove BARRIERs, but removing BARRIERs changes the way the
    instructions are associated with (basic) blocks by the liveness analysis
    code in resource.c (find_basic_block) and thus can cause entries in the
    cache maintained by resource.c to become outdated, thus producing wrong
    answers downstream.

    The fix is to invalidate the cache entries affected by the removal of
    BARRIERs in relax_delay_slots, i.e. for the instructions down to the
    next BARRIER.

            PR rtl-optimization/94119
            * resource.h (clear_hashed_info_until_next_barrier): Declare.
            * resource.c (clear_hashed_info_until_next_barrier): New function.
            * reorg.c (add_to_delay_list): Fix formatting.
            (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
            the next instruction after removing a BARRIER.

Reply via email to